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soc/amd/cezanne/include/gpio: fix GPIO 106 native function names 

The name looked a bit odd and the Cezanne PPR #56569 Rev 3.03 confirmed
that the native function names don't have the EMMC_ prefix.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I917c74afd98f2e2133e160d352f11f08c19a3ec6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2021-11-03 03:29:21 +01:00
parent 371cc15a89
commit 26806aed5c
2 changed files with 4 additions and 4 deletions
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4
src/mainboard/google/guybrush/variants/baseboard/gpio.c
View File

@ -117,7 +117,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* ESPI1_DATA1 */
PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE),
/* ESPI1_DATA2 */
PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
PAD_NF(GPIO_106, SPI2_WP_L_ESPI2_D2, PULL_NONE),
/* ESPI1_DATA3 */
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
/* ESPI_ALERT_L */
@ -217,7 +217,7 @@ static const struct soc_amd_gpio early_gpio_table[] = {
/* ESPI1_DATA1 */
PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE),
/* ESPI1_DATA2 */
PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
PAD_NF(GPIO_106, SPI2_WP_L_ESPI2_D2, PULL_NONE),
/* ESPI1_DATA3 */
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
/* ESPI_ALERT_L */

4
src/soc/amd/cezanne/include/soc/gpio.h
View File

@ -235,8 +235,8 @@
#define GPIO_105_IOMUX_SD0_DATA1 2
#define GPIO_105_IOMUX_GPIOxx 3
#define GPIO_106_IOMUX_LAD2 0
#define GPIO_106_IOMUX_EMMC_SPI2_WP_L_ESPI2_D2 1
#define GPIO_106_IOMUX_EMMC_SD0_DATA2 2
#define GPIO_106_IOMUX_SPI2_WP_L_ESPI2_D2 1
#define GPIO_106_IOMUX_SD0_DATA2 2
#define GPIO_106_IOMUX_GPIOxx 3
#define GPIO_107_IOMUX_LAD3 0
#define GPIO_107_IOMUX_SPI2_HOLD_L_ESPI2_D3 1