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psp_verstage: remove psp_ef_table struct 

psp_efs.h now has embedded_firmware struct which is copied from
amdfwtool. Remove psp_ef_table from psp_verstage and use it instead to
remove duplicates.

TEST=boot on zork and guybrush

Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ia362445cb7fc565b2d963f264461d833dc0338d0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kangheui Won 2021-10-18 15:31:45 +11:00 committed by Felix Held
parent aaa3b57a44
commit 26bb4aa1ad
4 changed files with 8 additions and 18 deletions
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2
src/soc/amd/cezanne/psp_verstage/chipset.c
View File

@ -13,7 +13,7 @@ uint32_t save_uapp_data(void *address, uint32_t size)
return svc_save_uapp_data(address, size);
}
uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table)
uint32_t get_bios_dir_addr(struct embedded_firmware *ef_table)
{
return ef_table->bios3_entry;
}

14
src/soc/amd/common/psp_verstage/include/psp_verstage.h
View File

@ -4,6 +4,7 @@
#define PSP_VERSTAGE_H
#include <2crypto.h>
#include <amdblocks/psp_efs.h>
#include <bl_uapp/bl_syscall_public.h>
#include <stdint.h>
#include <soc/psp_transfer.h>
@ -43,17 +44,6 @@
#define MIN_TRANSFER_BUFFER_SIZE (8 * KiB)
#define MIN_WORKBUF_TRANSFER_SIZE (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE)
struct psp_ef_table {
uint32_t signature; /* 0x55aa55aa */
uint32_t reserved0[4];
uint32_t psp_table;
uint32_t bios0_entry;
uint32_t bios1_entry;
uint32_t bios2_entry;
uint32_t reserved1;
uint32_t bios3_entry;
} __attribute__((packed, aligned(16)));
void test_svc_calls(void);
uint32_t unmap_fch_devices(void);
uint32_t verstage_soc_early_init(void);
@ -63,7 +53,7 @@ uintptr_t *map_spi_rom(void);
uint32_t get_max_workbuf_size(uint32_t *size);
uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset);
uint32_t save_uapp_data(void *address, uint32_t size);
uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table);
uint32_t get_bios_dir_addr(struct embedded_firmware *ef_table);
int platform_set_sha_op(enum vb2_hash_algorithm hash_alg,
struct sha_generic_data *sha_op);

8
src/soc/amd/common/psp_verstage/psp_verstage.c
View File

@ -76,7 +76,7 @@ static uint32_t check_cmos_recovery(void)
*/
static uint32_t update_boot_region(struct vb2_context *ctx)
{
struct psp_ef_table *ef_table;
struct embedded_firmware *ef_table;
uint32_t psp_dir_addr, bios_dir_addr;
uint32_t *psp_dir_in_spi, *bios_dir_in_spi;
const char *fname;
@ -100,13 +100,13 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
printk(BIOS_ERR, "Error: AMD Firmware table not found.\n");
return POSTCODE_AMD_FW_MISSING;
}
ef_table = (struct psp_ef_table *)amdfw_location;
ef_table = (struct embedded_firmware *)amdfw_location;
if (ef_table->signature != EMBEDDED_FW_SIGNATURE) {
printk(BIOS_ERR, "Error: ROMSIG address is not correct.\n");
return POSTCODE_ROMSIG_MISMATCH_ERROR;
}
psp_dir_addr = ef_table->psp_table;
psp_dir_addr = ef_table->combo_psp_directory;
bios_dir_addr = get_bios_dir_addr(ef_table);
psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) +
(uint32_t)boot_dev_base);
@ -121,7 +121,7 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR;
}
if (update_psp_bios_dir((void *)&psp_dir_addr, (void *)&bios_dir_addr)) {
if (update_psp_bios_dir(&psp_dir_addr, &bios_dir_addr)) {
printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n");
return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR;
}

2
src/soc/amd/picasso/psp_verstage/chipset.c
View File

@ -19,7 +19,7 @@ uint32_t get_max_workbuf_size(uint32_t *size)
return svc_get_max_workbuf_size(size);
}
uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table)
uint32_t get_bios_dir_addr(struct embedded_firmware *ef_table)
{
return ef_table->bios1_entry;
}