riscv: add support to block smp in each stage

Each stage performs some basic initialization (stack, HLS etc) and then
call smp_pause to enter the single-threaded state. The main work of each
stage is executed in a single-threaded state, and the multi-threaded
state is restored by call smp_resume while booting the next stage.

Change-Id: I8d508c3d0f65a022010e74f8edad7ad2cfdc7dee
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/29024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Hug <philipp@hug.cx>
This commit is contained in:
Xiang Wang 2018-10-11 17:42:49 +08:00 committed by Patrick Georgi
parent 7c9540ea1d
commit 26f725efc2
4 changed files with 16 additions and 8 deletions

View File

@ -19,6 +19,7 @@
#include <arch/encoding.h>
#include <rules.h>
#include <console/console.h>
#include <arch/smp/smp.h>
/*
* A pointer to the Flattened Device Tree passed to coreboot by the boot ROM.
@ -28,7 +29,7 @@
*/
const void *rom_fdt;
void arch_prog_run(struct prog *prog)
static void do_arch_prog_run(struct prog *prog)
{
void (*doit)(void *) = prog_entry(prog);
void riscvpayload(const void *fdt, void *payload);
@ -48,3 +49,8 @@ void arch_prog_run(struct prog *prog)
doit(prog_entry_arg(prog));
}
void arch_prog_run(struct prog *prog)
{
smp_resume((void (*)(void *))do_arch_prog_run, prog);
}

View File

@ -24,13 +24,6 @@
.global _estack
.globl _start
_start:
csrr a0, mhartid
li a3, 0
beq a0, a3, _hart_zero
_hart_loop:
j _hart_loop
_hart_zero:
# The boot ROM may pass the following arguments to coreboot:
# a0: the value of mhartid
# a1: a pointer to the flattened devicetree
@ -59,6 +52,9 @@ _hart_zero:
csrr a0, mhartid
call hls_init
li a0, CONFIG_RISCV_WORKING_HARTID
call smp_pause
# initialize entry of interrupt/exception
la t0, trap_entry
csrw mtvec, t0

View File

@ -35,6 +35,9 @@ _start:
csrr a0, mhartid
call hls_init
li a0, CONFIG_RISCV_WORKING_HARTID
call smp_pause
# initialize entry of interrupt/exception
la t0, trap_entry
csrw mtvec, t0

View File

@ -27,10 +27,13 @@
#include <arch/boot.h>
#include <arch/encoding.h>
#include <arch/stages.h>
#include <arch/smp/smp.h>
#include <rules.h>
void stage_entry(void)
{
smp_pause(CONFIG_RISCV_WORKING_HARTID);
/*
* Save the FDT pointer before entering ramstage, because mscratch
* might be overwritten in the trap handler, and there is code in