soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi

This patch creates a common instance of sleepstates.asl inside intel common code (southbridge/intel/common/acpi) and asks all IA CPU/SOC code to refer sleepstates.asl from common code block. TEST=Able to build and boot Hatch and ICL DE system. Dump DSDT.asl to verify S0/S3/S4/S5 entries after booting to OS. Change-Id: Ie2132189f91211df74f8b5546da63ded4fdf687a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36463 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-30 16:48:19 +05:30 · 2019-10-30 16:48:19 +05:30 · 2715cdb3f3
commit 2715cdb3f3
parent 1e8f305957
133 changed files with 120 additions and 424 deletions
--- a/src/mainboard/adi/rcc-dff/dsdt.asl
+++ b/src/mainboard/adi/rcc-dff/dsdt.asl
@ -49,5 +49,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/apple/macbook21/dsdt.asl
+++ b/src/mainboard/apple/macbook21/dsdt.asl
@ -46,5 +46,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/apple/macbookair4_2/dsdt.asl
+++ b/src/mainboard/apple/macbookair4_2/dsdt.asl
@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/asrock/b75pro3-m/dsdt.asl
+++ b/src/mainboard/asrock/b75pro3-m/dsdt.asl
@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/asrock/g41c-gs/dsdt.asl
+++ b/src/mainboard/asrock/g41c-gs/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/asrock/h110m/dsdt.asl
+++ b/src/mainboard/asrock/h110m/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	}

 	// Chipset specific sleep states
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/asrock/h81m-hds/dsdt.asl
+++ b/src/mainboard/asrock/h81m-hds/dsdt.asl
@ -27,7 +27,7 @@ DefinitionBlock(
 	#include "acpi/platform.asl"
 	#include <southbridge/intel/lynxpoint/acpi/platform.asl>
 	#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
-	#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 	#include <cpu/intel/common/acpi/cpu.asl>

 	Scope (\_SB)
--- a/src/mainboard/asus/h61m-cs/dsdt.asl
+++ b/src/mainboard/asus/h61m-cs/dsdt.asl
@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Device (\_SB.PCI0) {
 		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
--- a/src/mainboard/asus/maximus_iv_gene-z/dsdt.asl
+++ b/src/mainboard/asus/maximus_iv_gene-z/dsdt.asl
@ -28,7 +28,7 @@ DefinitionBlock(
 	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB)
 	{
--- a/src/mainboard/asus/p5gc-mx/dsdt.asl
+++ b/src/mainboard/asus/p5gc-mx/dsdt.asl
@ -50,5 +50,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/asus/p5qc/dsdt.asl
+++ b/src/mainboard/asus/p5qc/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801jx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/asus/p5qpl-am/dsdt.asl
+++ b/src/mainboard/asus/p5qpl-am/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/asus/p8h61-m_lx/dsdt.asl
+++ b/src/mainboard/asus/p8h61-m_lx/dsdt.asl
@ -28,7 +28,7 @@ DefinitionBlock(
 	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB)
 	{
--- a/src/mainboard/asus/p8h61-m_pro/dsdt.asl
+++ b/src/mainboard/asus/p8h61-m_pro/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(

 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/asus/p8z77-m_pro/dsdt.asl
+++ b/src/mainboard/asus/p8z77-m_pro/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>

 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Device (\_SB.PCI0)
 	{
--- a/src/mainboard/compulab/intense_pc/dsdt.asl
+++ b/src/mainboard/compulab/intense_pc/dsdt.asl
@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/esd/atom15/dsdt.asl
+++ b/src/mainboard/esd/atom15/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/fsp_baytrail/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	#include "acpi/mainboard.asl"
 }
--- a/src/mainboard/foxconn/d41s/dsdt.asl
+++ b/src/mainboard/foxconn/d41s/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/foxconn/g41s-k/dsdt.asl
+++ b/src/mainboard/foxconn/g41s-k/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/getac/p470/dsdt.asl
+++ b/src/mainboard/getac/p470/dsdt.asl
@ -55,5 +55,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl
@ -50,5 +50,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <cpu/intel/common/acpi/cpu.asl>
 	/* global NVS and variables. */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl
@ -35,7 +35,7 @@ DefinitionBlock(

 	/* global NVS and variables. */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Device (\_SB.PCI0)
 	{
--- a/src/mainboard/google/auron/dsdt.asl
+++ b/src/mainboard/google/auron/dsdt.asl
@ -51,7 +51,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <soc/intel/broadwell/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/google/beltino/dsdt.asl
+++ b/src/mainboard/google/beltino/dsdt.asl
@ -53,5 +53,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/google/butterfly/dsdt.asl
+++ b/src/mainboard/google/butterfly/dsdt.asl
@ -54,5 +54,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/google/cyan/dsdt.asl
+++ b/src/mainboard/google/cyan/dsdt.asl
@ -62,7 +62,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	#include "acpi/mainboard.asl"
 }
--- a/src/mainboard/google/dragonegg/dsdt.asl
+++ b/src/mainboard/google/dragonegg/dsdt.asl
@ -49,7 +49,7 @@ DefinitionBlock(
 #endif

 	// Chipset specific sleep states
-	#include <soc/intel/icelake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/drallion/dsdt.asl
+++ b/src/mainboard/google/drallion/dsdt.asl
@ -54,7 +54,7 @@ DefinitionBlock(
 #endif

 	/* Chipset specific sleep states */
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Low power idle table */
 	#include <soc/intel/cannonlake/acpi/lpit.asl>
--- a/src/mainboard/google/eve/dsdt.asl
+++ b/src/mainboard/google/eve/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/fizz/dsdt.asl
+++ b/src/mainboard/google/fizz/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/glados/dsdt.asl
+++ b/src/mainboard/google/glados/dsdt.asl
@ -49,7 +49,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/google/hatch/dsdt.asl
+++ b/src/mainboard/google/hatch/dsdt.asl
@ -52,10 +52,10 @@ DefinitionBlock(
 #endif

 	/* Chipset specific sleep states */
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

-        /* Low power idle table */
-        #include <soc/intel/cannonlake/acpi/lpit.asl>
+	/* Low power idle table */
+	#include <soc/intel/cannonlake/acpi/lpit.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/jecht/dsdt.asl
+++ b/src/mainboard/google/jecht/dsdt.asl
@ -51,7 +51,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <soc/intel/broadwell/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/google/link/dsdt.asl
+++ b/src/mainboard/google/link/dsdt.asl
@ -55,5 +55,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/google/octopus/dsdt.asl
+++ b/src/mainboard/google/octopus/dsdt.asl
@ -45,7 +45,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/apollolake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/parrot/dsdt.asl
+++ b/src/mainboard/google/parrot/dsdt.asl
@ -55,5 +55,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/google/poppy/dsdt.asl
+++ b/src/mainboard/google/poppy/dsdt.asl
@ -55,7 +55,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/rambi/dsdt.asl
+++ b/src/mainboard/google/rambi/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/baytrail/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	#include "acpi/mainboard.asl"
 }
--- a/src/mainboard/google/reef/dsdt.asl
+++ b/src/mainboard/google/reef/dsdt.asl
@ -45,7 +45,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/apollolake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/google/sarien/dsdt.asl
+++ b/src/mainboard/google/sarien/dsdt.asl
@ -54,7 +54,7 @@ DefinitionBlock(
 #endif

 	/* Chipset specific sleep states */
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Low power idle table */
 	#include <soc/intel/cannonlake/acpi/lpit.asl>
--- a/src/mainboard/google/slippy/dsdt.asl
+++ b/src/mainboard/google/slippy/dsdt.asl
@ -64,5 +64,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/google/stout/dsdt.asl
+++ b/src/mainboard/google/stout/dsdt.asl
@ -55,5 +55,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/hp/2570p/dsdt.asl
+++ b/src/mainboard/hp/2570p/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/2760p/dsdt.asl
+++ b/src/mainboard/hp/2760p/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/8460p/dsdt.asl
+++ b/src/mainboard/hp/8460p/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/8470p/dsdt.asl
+++ b/src/mainboard/hp/8470p/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/8770w/dsdt.asl
+++ b/src/mainboard/hp/8770w/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl
+++ b/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/folio_9470m/dsdt.asl
+++ b/src/mainboard/hp/folio_9470m/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/revolve_810_g1/dsdt.asl
+++ b/src/mainboard/hp/revolve_810_g1/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/hp/z220_sff_workstation/dsdt.asl
+++ b/src/mainboard/hp/z220_sff_workstation/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/ibase/mb899/dsdt.asl
+++ b/src/mainboard/ibase/mb899/dsdt.asl
@ -47,5 +47,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/apollolake_rvp/dsdt.asl
+++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl
@ -33,6 +33,6 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/apollolake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 }
--- a/src/mainboard/intel/baskingridge/dsdt.asl
+++ b/src/mainboard/intel/baskingridge/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/bayleybay_fsp/dsdt.asl
+++ b/src/mainboard/intel/bayleybay_fsp/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/fsp_baytrail/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	#include "acpi/mainboard.asl"
 }
--- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl
+++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl
@ -45,6 +45,6 @@ DefinitionBlock(
 	#endif

 	// Chipset specific sleep states
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 }
--- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl
+++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl
@ -45,6 +45,6 @@ DefinitionBlock(
 #endif

 	// Chipset specific sleep states
-	#include <soc/intel/cannonlake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 }
--- a/src/mainboard/intel/d510mo/dsdt.asl
+++ b/src/mainboard/intel/d510mo/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/d945gclf/dsdt.asl
+++ b/src/mainboard/intel/d945gclf/dsdt.asl
@ -50,5 +50,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/dcp847ske/dsdt.asl
+++ b/src/mainboard/intel/dcp847ske/dsdt.asl
@ -30,7 +30,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/intel/dg41wv/dsdt.asl
+++ b/src/mainboard/intel/dg41wv/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/dg43gt/dsdt.asl
+++ b/src/mainboard/intel/dg43gt/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801jx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/emeraldlake2/dsdt.asl
+++ b/src/mainboard/intel/emeraldlake2/dsdt.asl
@ -53,5 +53,5 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/glkrvp/dsdt.asl
+++ b/src/mainboard/intel/glkrvp/dsdt.asl
@ -45,7 +45,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <soc/intel/apollolake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
--- a/src/mainboard/intel/harcuvar/dsdt.asl
+++ b/src/mainboard/intel/harcuvar/dsdt.asl
@ -50,5 +50,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/denverton_ns/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/icelake_rvp/dsdt.asl
+++ b/src/mainboard/intel/icelake_rvp/dsdt.asl
@ -60,7 +60,7 @@ DefinitionBlock(
 #endif

 	// Chipset specific sleep states
-	#include <soc/intel/icelake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/intel/kblrvp/dsdt.asl
+++ b/src/mainboard/intel/kblrvp/dsdt.asl
@ -57,7 +57,7 @@ DefinitionBlock(
 #endif

 	// Chipset specific sleep states
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/intel/kunimitsu/dsdt.asl
+++ b/src/mainboard/intel/kunimitsu/dsdt.asl
@ -49,7 +49,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/intel/leafhill/dsdt.asl
+++ b/src/mainboard/intel/leafhill/dsdt.asl
@ -39,5 +39,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/apollolake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/littleplains/dsdt.asl
+++ b/src/mainboard/intel/littleplains/dsdt.asl
@ -49,5 +49,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/minnow3/dsdt.asl
+++ b/src/mainboard/intel/minnow3/dsdt.asl
@ -39,5 +39,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/apollolake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/minnowmax/dsdt.asl
+++ b/src/mainboard/intel/minnowmax/dsdt.asl
@ -48,7 +48,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <soc/intel/fsp_baytrail/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	#include "acpi/mainboard.asl"
 }
--- a/src/mainboard/intel/mohonpeak/dsdt.asl
+++ b/src/mainboard/intel/mohonpeak/dsdt.asl
@ -49,5 +49,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/intel/saddlebrook/dsdt.asl
+++ b/src/mainboard/intel/saddlebrook/dsdt.asl
@ -43,7 +43,7 @@ DefinitionBlock(
 	}

 	// Chipset specific sleep states
-	#include <soc/intel/skylake/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/intel/strago/dsdt.asl
+++ b/src/mainboard/intel/strago/dsdt.asl
@ -58,7 +58,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	/* Chipset specific sleep states */
-	#include <acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	#include "acpi/mainboard.asl"
 }
--- a/src/mainboard/intel/wtm2/dsdt.asl
+++ b/src/mainboard/intel/wtm2/dsdt.asl
@ -53,7 +53,7 @@ DefinitionBlock(
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>

 	// Chipset specific sleep states
-	#include <soc/intel/broadwell/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Mainboard specific
 	#include "acpi/mainboard.asl"
--- a/src/mainboard/kontron/986lcd-m/dsdt.asl
+++ b/src/mainboard/kontron/986lcd-m/dsdt.asl
@ -46,5 +46,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/kontron/ktqm77/dsdt.asl
+++ b/src/mainboard/kontron/ktqm77/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/l520/dsdt.asl
+++ b/src/mainboard/lenovo/l520/dsdt.asl
@ -33,7 +33,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/lenovo/s230u/dsdt.asl
+++ b/src/mainboard/lenovo/s230u/dsdt.asl
@ -32,7 +32,7 @@ DefinitionBlock(
 	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/lenovo/t400/dsdt.asl
+++ b/src/mainboard/lenovo/t400/dsdt.asl
@ -53,7 +53,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801ix/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Hybrid graphics support code */
 	#include "acpi/graphics.asl"
--- a/src/mainboard/lenovo/t410/dsdt.asl
+++ b/src/mainboard/lenovo/t410/dsdt.asl
@ -87,7 +87,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Dock support code */
 	#include "acpi/dock.asl"
--- a/src/mainboard/lenovo/t420/dsdt.asl
+++ b/src/mainboard/lenovo/t420/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/t420s/dsdt.asl
+++ b/src/mainboard/lenovo/t420s/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/t430/dsdt.asl
+++ b/src/mainboard/lenovo/t430/dsdt.asl
@ -37,7 +37,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/platform.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/lenovo/t430s/dsdt.asl
+++ b/src/mainboard/lenovo/t430s/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/t440p/dsdt.asl
+++ b/src/mainboard/lenovo/t440p/dsdt.asl
@ -35,7 +35,7 @@ DefinitionBlock(
 	#include <southbridge/intel/lynxpoint/acpi/platform.asl>
 	/* global NVS and variables. */
 	#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
-	#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Device (\_SB.PCI0)
 	{
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/t530/dsdt.asl
+++ b/src/mainboard/lenovo/t530/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/t60/dsdt.asl
+++ b/src/mainboard/lenovo/t60/dsdt.asl
@ -59,7 +59,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Dock support code
 	#include "acpi/dock.asl"
--- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl
+++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl
@ -38,5 +38,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/x131e/dsdt.asl
+++ b/src/mainboard/lenovo/x131e/dsdt.asl
@ -41,7 +41,7 @@ DefinitionBlock(
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

 	// Chipset specific sleep states
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	Scope (\_SB) {
 		Device (PCI0)
--- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
+++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/x200/dsdt.asl
+++ b/src/mainboard/lenovo/x200/dsdt.asl
@ -52,7 +52,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801ix/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Dock support code */
 	#include "acpi/dock.asl"
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@ -87,7 +87,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	/* Dock support code */
 	#include "acpi/dock.asl"
--- a/src/mainboard/lenovo/x220/dsdt.asl
+++ b/src/mainboard/lenovo/x220/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/x230/dsdt.asl
+++ b/src/mainboard/lenovo/x230/dsdt.asl
@ -52,5 +52,5 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }
--- a/src/mainboard/lenovo/x60/dsdt.asl
+++ b/src/mainboard/lenovo/x60/dsdt.asl
@ -53,7 +53,7 @@ DefinitionBlock(
 	}

 	/* Chipset specific sleep states */
-	#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
+	#include <southbridge/intel/common/acpi/sleepstates.asl>

 	// Dock support code
 	#include "acpi/dock.asl"
--- a/Show more
+++ b/Show more