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soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi

Browse source 
This patch creates a common instance of sleepstates.asl inside intel common
code (southbridge/intel/common/acpi) and asks all IA CPU/SOC code to
refer sleepstates.asl from common code block.

TEST=Able to build and boot Hatch and ICL DE system. Dump DSDT.asl to verify
S0/S3/S4/S5 entries after booting to OS.

Change-Id: Ie2132189f91211df74f8b5546da63ded4fdf687a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36463
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2019-10-30 16:48:19 +05:30 committed by Patrick Georgi
parent 1e8f305957
commit 2715cdb3f3
133 changed files with 120 additions and 424 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/mainboard/adi/rcc-dff/dsdt.asl
View file

@ -49,5 +49,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/apple/macbook21/dsdt.asl
View file

@ -46,5 +46,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/apple/macbookair4_2/dsdt.asl
View file

@ -30,7 +30,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/asrock/b75pro3-m/dsdt.asl
View file

@ -33,7 +33,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/asrock/g41c-gs/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/asrock/h110m/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
}
// Chipset specific sleep states
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/asrock/h81m-hds/dsdt.asl
View file

@ -27,7 +27,7 @@ DefinitionBlock(
#include "acpi/platform.asl"
#include <southbridge/intel/lynxpoint/acpi/platform.asl>
#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include <cpu/intel/common/acpi/cpu.asl>
Scope (\_SB)

2
src/mainboard/asus/h61m-cs/dsdt.asl
View file

@ -30,7 +30,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Device (\_SB.PCI0) {
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>

2
src/mainboard/asus/maximus_iv_gene-z/dsdt.asl
View file

@ -28,7 +28,7 @@ DefinitionBlock(
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB)
{

2
src/mainboard/asus/p5gc-mx/dsdt.asl
View file

@ -50,5 +50,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/asus/p5qc/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801jx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/asus/p5qpl-am/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/asus/p8h61-m_lx/dsdt.asl
View file

@ -28,7 +28,7 @@ DefinitionBlock(
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB)
{

2
src/mainboard/asus/p8h61-m_pro/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/asus/p8z77-m_pro/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Device (\_SB.PCI0)
{

2
src/mainboard/compulab/intense_pc/dsdt.asl
View file

@ -33,7 +33,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/esd/atom15/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/fsp_baytrail/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"
}

2
src/mainboard/foxconn/d41s/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/foxconn/g41s-k/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/getac/p470/dsdt.asl
View file

@ -55,5 +55,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl
View file

@ -50,5 +50,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
View file

@ -30,7 +30,7 @@ DefinitionBlock(
#include <cpu/intel/common/acpi/cpu.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl
View file

@ -35,7 +35,7 @@ DefinitionBlock(
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Device (\_SB.PCI0)
{

2
src/mainboard/google/auron/dsdt.asl
View file

@ -51,7 +51,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <soc/intel/broadwell/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/google/beltino/dsdt.asl
View file

@ -53,5 +53,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/google/butterfly/dsdt.asl
View file

@ -54,5 +54,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/google/cyan/dsdt.asl
View file

@ -62,7 +62,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"
}

2
src/mainboard/google/dragonegg/dsdt.asl
View file

@ -49,7 +49,7 @@ DefinitionBlock(
#endif
// Chipset specific sleep states
#include <soc/intel/icelake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/google/drallion/dsdt.asl
View file

@ -54,7 +54,7 @@ DefinitionBlock(
#endif
/* Chipset specific sleep states */
#include <soc/intel/cannonlake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */
#include <soc/intel/cannonlake/acpi/lpit.asl>

2
src/mainboard/google/eve/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/google/fizz/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/google/glados/dsdt.asl
View file

@ -49,7 +49,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/google/hatch/dsdt.asl
View file

@ -52,7 +52,7 @@ DefinitionBlock(
#endif
/* Chipset specific sleep states */
#include <soc/intel/cannonlake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */
#include <soc/intel/cannonlake/acpi/lpit.asl>

2
src/mainboard/google/jecht/dsdt.asl
View file

@ -51,7 +51,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <soc/intel/broadwell/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/google/link/dsdt.asl
View file

@ -55,5 +55,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/google/octopus/dsdt.asl
View file

@ -45,7 +45,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/google/parrot/dsdt.asl
View file

@ -55,5 +55,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/google/poppy/dsdt.asl
View file

@ -55,7 +55,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/google/rambi/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/baytrail/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"
}

2
src/mainboard/google/reef/dsdt.asl
View file

@ -45,7 +45,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/google/sarien/dsdt.asl
View file

@ -54,7 +54,7 @@ DefinitionBlock(
#endif
/* Chipset specific sleep states */
#include <soc/intel/cannonlake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */
#include <soc/intel/cannonlake/acpi/lpit.asl>

2
src/mainboard/google/slippy/dsdt.asl
View file

@ -64,5 +64,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/google/stout/dsdt.asl
View file

@ -55,5 +55,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/hp/2570p/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/2760p/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/8460p/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/8470p/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/8770w/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/folio_9470m/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/revolve_810_g1/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/hp/z220_sff_workstation/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/ibase/mb899/dsdt.asl
View file

@ -47,5 +47,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/apollolake_rvp/dsdt.asl
View file

@ -33,6 +33,6 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/baskingridge/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/bayleybay_fsp/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/fsp_baytrail/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"
}

2
src/mainboard/intel/cannonlake_rvp/dsdt.asl
View file

@ -45,6 +45,6 @@ DefinitionBlock(
#endif
// Chipset specific sleep states
#include <soc/intel/cannonlake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/coffeelake_rvp/dsdt.asl
View file

@ -45,6 +45,6 @@ DefinitionBlock(
#endif
// Chipset specific sleep states
#include <soc/intel/cannonlake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/d510mo/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/d945gclf/dsdt.asl
View file

@ -50,5 +50,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/dcp847ske/dsdt.asl
View file

@ -30,7 +30,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/intel/dg41wv/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/dg43gt/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801jx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/emeraldlake2/dsdt.asl
View file

@ -53,5 +53,5 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/glkrvp/dsdt.asl
View file

@ -45,7 +45,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)

2
src/mainboard/intel/harcuvar/dsdt.asl
View file

@ -50,5 +50,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/denverton_ns/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/icelake_rvp/dsdt.asl
View file

@ -60,7 +60,7 @@ DefinitionBlock(
#endif
// Chipset specific sleep states
#include <soc/intel/icelake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/intel/kblrvp/dsdt.asl
View file

@ -57,7 +57,7 @@ DefinitionBlock(
#endif
// Chipset specific sleep states
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/intel/kunimitsu/dsdt.asl
View file

@ -49,7 +49,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/intel/leafhill/dsdt.asl
View file

@ -39,5 +39,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/littleplains/dsdt.asl
View file

@ -49,5 +49,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/minnow3/dsdt.asl
View file

@ -39,5 +39,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/minnowmax/dsdt.asl
View file

@ -48,7 +48,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <soc/intel/fsp_baytrail/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"
}

2
src/mainboard/intel/mohonpeak/dsdt.asl
View file

@ -49,5 +49,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/intel/saddlebrook/dsdt.asl
View file

@ -43,7 +43,7 @@ DefinitionBlock(
}
// Chipset specific sleep states
#include <soc/intel/skylake/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/intel/strago/dsdt.asl
View file

@ -58,7 +58,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
#include <acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl"
}

2
src/mainboard/intel/wtm2/dsdt.asl
View file

@ -53,7 +53,7 @@ DefinitionBlock(
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states
#include <soc/intel/broadwell/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific
#include "acpi/mainboard.asl"

2
src/mainboard/kontron/986lcd-m/dsdt.asl
View file

@ -46,5 +46,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/kontron/ktqm77/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/l520/dsdt.asl
View file

@ -33,7 +33,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/lenovo/s230u/dsdt.asl
View file

@ -32,7 +32,7 @@ DefinitionBlock(
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/lenovo/t400/dsdt.asl
View file

@ -53,7 +53,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801ix/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Hybrid graphics support code */
#include "acpi/graphics.asl"

2
src/mainboard/lenovo/t410/dsdt.asl
View file

@ -87,7 +87,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */
#include "acpi/dock.asl"

2
src/mainboard/lenovo/t420/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/t420s/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/t430/dsdt.asl
View file

@ -37,7 +37,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/lenovo/t430s/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/t440p/dsdt.asl
View file

@ -35,7 +35,7 @@ DefinitionBlock(
#include <southbridge/intel/lynxpoint/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
#include <southbridge/intel/lynxpoint/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Device (\_SB.PCI0)
{

2
src/mainboard/lenovo/t520/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/t530/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/t60/dsdt.asl
View file

@ -59,7 +59,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Dock support code
#include "acpi/dock.asl"

2
src/mainboard/lenovo/thinkcentre_a58/dsdt.asl
View file

@ -38,5 +38,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/x131e/dsdt.asl
View file

@ -41,7 +41,7 @@ DefinitionBlock(
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
// Chipset specific sleep states
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)

2
src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/x200/dsdt.asl
View file

@ -52,7 +52,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801ix/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */
#include "acpi/dock.asl"

2
src/mainboard/lenovo/x201/dsdt.asl
View file

@ -87,7 +87,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */
#include "acpi/dock.asl"

2
src/mainboard/lenovo/x220/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/x230/dsdt.asl
View file

@ -52,5 +52,5 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
}

2
src/mainboard/lenovo/x60/dsdt.asl
View file

@ -53,7 +53,7 @@ DefinitionBlock(
}
/* Chipset specific sleep states */
#include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
// Dock support code
#include "acpi/dock.asl"

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