superio/nsc/pc87366: Use common early_serial
Change-Id: I1f03182cd760ea63df78ef3e2b2604c3322b4f3f Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/31336 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -15,3 +15,4 @@
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config SUPERIO_NSC_PC87366
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bool
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select SUPERIO_NSC_COMMON_PRE_RAM
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@ -15,6 +15,4 @@
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## GNU General Public License for more details.
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##
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bootblock-$(CONFIG_SUPERIO_NSC_PC87366) += early_serial.c
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romstage-$(CONFIG_SUPERIO_NSC_PC87366) += early_serial.c
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ramstage-$(CONFIG_SUPERIO_NSC_PC87366) += superio.c
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@ -1,29 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2000 AG Electronics Ltd.
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* Copyright (C) 2003-2004 Linux Networx
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <stdint.h>
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#include "pc87366.h"
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void pc87366_enable_serial(pnp_devfn_t dev, u16 iobase)
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{
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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}
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@ -34,9 +34,4 @@
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#define PC87366_VLM 0x0D
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#define PC87366_TMS 0x0E
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#include <arch/io.h>
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#include <stdint.h>
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void pc87366_enable_serial(pnp_devfn_t dev, u16 iobase);
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#endif /* SUPERIO_NSC_PC87366_H */
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