{driver, mb, soc}: Rename Intel CSE FPT config to ISH FW version config
This patch renames `SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION` config to `SOC_INTEL_STORE_ISH_FW_VERSION` to ensure the usage of this config is clear. Any platform would like to fetch the currently running ISH firmware version should select this configuration. TEST=Able to build and boot google/marasov. Change-Id: Ie503d6a5bf5bd0d3d561355b592e75b22c910bf5 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75767 Reviewed-by: Kangheui Won <khwon@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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@ -63,7 +63,7 @@ static void intel_ish_get_version(void)
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static void intel_ish_final(struct device *dev)
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{
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if (CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION))
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if (CONFIG(SOC_INTEL_STORE_ISH_FW_VERSION))
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intel_ish_get_version();
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}
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@ -87,7 +87,7 @@ config BOARD_GOOGLE_BASEBOARD_NISSA
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select SOC_INTEL_ALDERLAKE_PCH_N
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select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW
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select SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE
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select SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION
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select SOC_INTEL_STORE_ISH_FW_VERSION
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select SYSTEM_TYPE_LAPTOP
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select TPM_GOOGLE_TI50
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select SOC_INTEL_COMMON_MMC_OVERRIDE
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@ -162,7 +162,7 @@ const char *soc_acpi_name(const struct device *dev)
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}
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#endif
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#if CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION)
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#if CONFIG(SOC_INTEL_STORE_ISH_FW_VERSION)
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/*
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* SoC override API to identify if ISH Firmware existed inside CSE FPT.
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*
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@ -45,22 +45,23 @@ config SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR
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Use this config for SoC platform prior to CNL PCH (with postboot_sai implemented)
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to make `HECI1` device disable using private configuration register (PCR) write.
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config SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION
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config SOC_INTEL_STORE_ISH_FW_VERSION
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bool
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default n
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depends on DRIVERS_INTEL_ISH
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help
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This configuration option stores CSE FPT partitions' version in CBMEM memory.
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This information can be used to identify the currently running firmware partition
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This configuration option stores ISH version in CBMEM area.
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This information can be used to identify the currently running ISH firmware
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version.
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The cost of sending HECI command to read the CSE FPT is significant (~200ms)
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hence, the idea is to read the CSE RW version on every cold reset (to cover
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the CSE update scenarios) and store into CBMEM to avoid the cost of resending
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the HECI command in all consecutive warm boots.
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ISH BUP is sitting inside the CSE firmware partition. The way to retrieve the
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ISH version is by sending the HECI command to read the CSE FPT. The cost of sending
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HECI command to read the CSE FPT is significant (~200ms) hence, the idea is to
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read the CSE RW version on every cold reset (to cover the CSE update scenarios)
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and store into CBMEM to avoid the cost of resending the HECI command in all
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consecutive warm boots.
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Later boot stages can just read the CBMEM ID to retrieve the ISH version if
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required.
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Later boot stages can just read the CBMEM ID to retrieve the ISH version.
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Additionally, ensure this feature is platform specific hence, only enabled
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for the platform that would like to store the ISH version into the CBMEM and
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@ -1307,7 +1307,7 @@ static void ramstage_cse_misc_ops(void *unused)
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* Store the CSE/ISH RW Firmware Version into CBMEM if ISH partition
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* is available
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*/
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if (CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION) &&
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if (CONFIG(SOC_INTEL_STORE_ISH_FW_VERSION) &&
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soc_is_ish_partition_enabled()) {
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store_cse_rw_fw_version();
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store_ish_version();
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@ -528,7 +528,7 @@ void soc_disable_heci1_using_pcr(void);
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* identifying the UFS enabled device is enough to conclude if ISH partition is
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* available.
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*/
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#if CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION)
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#if CONFIG(SOC_INTEL_STORE_ISH_FW_VERSION)
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bool soc_is_ish_partition_enabled(void);
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#else
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static inline bool soc_is_ish_partition_enabled(void)
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