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mainboard 64bit fixes 

Change-Id: I2b4338927d56a2075c0a95f2ab981f1beaf69cc7
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11082
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer 2015-07-30 16:17:10 -07:00 committed by Stefan Reinauer
parent 5c5c4a6943
commit 273911cfd6
14 changed files with 85 additions and 46 deletions
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20
src/mainboard/amd/dinar/fadt.c
View File

@ -48,8 +48,16 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 0;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
else
fadt->firmware_ctrl = (uintptr_t)facs;
if ((uintptr_t)dsdt > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
else
fadt->dsdt = (uintptr_t)dsdt;
/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
fadt->preferred_pm_profile = 0x03;
fadt->sci_int = 9;
@ -102,10 +110,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 6;
fadt->x_firmware_ctl_l = (u32) facs;
fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
fadt->x_pm1a_evt_blk.space_id = 1;
fadt->x_pm1a_evt_blk.bit_width = 32;

4
src/mainboard/amd/dinar/mptable.c
View File

@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set sb700 IOAPIC ID */
dword = (u8 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
dword = (u8 *)(uintptr_t)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sb700, 0x20, dword);
/*
@ -80,7 +80,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
dword = (u8 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
dword = (u8 *)(uintptr_t)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_rd890, 0x20, dword);
}

2
src/mainboard/amd/dinar/rd890_cfg.c
View File

@ -109,7 +109,7 @@ static void nb_platform_config(device_t nb_dev, AMD_NB_CONFIG *NbConfigPtr)
* @param[in] *config Northbridge configuration structure pointer.
*
*/
static u32 rd890_callout_entry(u32 func, u32 data, void *config)
static u32 rd890_callout_entry(u32 func, uintptr_t data, void *config)
{
u32 ret = 0;
#ifndef __PRE_RAM__

20
src/mainboard/amd/torpedo/fadt.c
View File

@ -60,8 +60,16 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 0;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
else
fadt->firmware_ctrl = (uintptr_t)facs;
if ((uintptr_t)dsdt > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
else
fadt->dsdt = (uintptr_t)dsdt;
/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
fadt->preferred_pm_profile = 0x03;
fadt->sci_int = 9;
@ -138,10 +146,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 6;
fadt->x_firmware_ctl_l = (u32) facs;
fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
fadt->x_pm1a_evt_blk.space_id = 1;
fadt->x_pm1a_evt_blk.bit_width = 32;

7
src/mainboard/gizmosphere/gizmo/mainboard.c
View File

@ -75,17 +75,16 @@ static void mainboard_enable(device_t dev)
RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGDA, AccWidthUint8, 0xFB, 0x04);
}
void mainboard_final( void *chip_info );
void mainboard_final( void *chip_info )
static void mainboard_final(void *chip_info)
{
device_t ahci_dev;
u32 ABAR;
uintptr_t ABAR;
u8 *memptr;
ahci_dev = dev_find_slot(0, PCI_DEVFN(0x11, 0));
ABAR = pci_read_config32(ahci_dev, 0x24);
ABAR &= 0xFFFFFC00;
memptr = (u8 *) (ABAR + 0x100 + 0x80 + 0x2C); /* we're on the 2nd port */
memptr = (u8 *)(ABAR + 0x100 + 0x80 + 0x2C); /* we're on the 2nd port */
*memptr = 0x21; /* force to GEN2 and start re-negotiate */
mdelay (1);
*memptr = 0x20;

20
src/mainboard/supermicro/h8qgi/fadt.c
View File

@ -49,8 +49,16 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 0;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
else
fadt->firmware_ctrl = (uintptr_t)facs;
if ((uintptr_t)dsdt > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
else
fadt->dsdt = (uintptr_t)dsdt;
/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
fadt->preferred_pm_profile = 0x03;
fadt->sci_int = 9;
@ -103,10 +111,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 6;
fadt->x_firmware_ctl_l = (u32) facs;
fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
fadt->x_pm1a_evt_blk.space_id = 1;
fadt->x_pm1a_evt_blk.bit_width = 32;

4
src/mainboard/supermicro/h8qgi/mptable.c
View File

@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
dword = (u32 *)(uintptr_t)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x20, dword);
#ifdef UNUSED_CODE
@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
dword = (u32 *)(uintptr_t)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sr5650, 0x20, dword);
}

2
src/mainboard/supermicro/h8qgi/rd890_cfg.c
View File

@ -109,7 +109,7 @@ static void nb_platform_config(device_t nb_dev, AMD_NB_CONFIG *NbConfigPtr)
* @param[in] *config Northbridge configuration structure pointer.
*
*/
static u32 rd890_callout_entry(u32 func, u32 data, void *config)
static u32 rd890_callout_entry(u32 func, uintptr_t data, void *config)
{
u32 ret = 0;
#ifndef __PRE_RAM__

20
src/mainboard/supermicro/h8scm/fadt.c
View File

@ -49,8 +49,16 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 0;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
else
fadt->firmware_ctrl = (uintptr_t)facs;
if ((uintptr_t)dsdt > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
else
fadt->dsdt = (uintptr_t)dsdt;
/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
fadt->preferred_pm_profile = 0x03;
fadt->sci_int = 9;
@ -103,10 +111,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 6;
fadt->x_firmware_ctl_l = (u32) facs;
fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
fadt->x_pm1a_evt_blk.space_id = 1;
fadt->x_pm1a_evt_blk.bit_width = 32;

4
src/mainboard/supermicro/h8scm/mptable.c
View File

@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
dword = (u32 *)(uintptr_t)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x20, dword);
#ifdef UNUSED_CODE
@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
dword = (u32 *)(uintptr_t)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sr5650, 0x20, dword);
}

2
src/mainboard/supermicro/h8scm/rd890_cfg.c
View File

@ -109,7 +109,7 @@ static void nb_platform_config(device_t nb_dev, AMD_NB_CONFIG *NbConfigPtr)
* @param[in] *config Northbridge configuration structure pointer.
*
*/
static u32 rd890_callout_entry(u32 func, u32 data, void *config)
static u32 rd890_callout_entry(u32 func, uintptr_t data, void *config)
{
u32 ret = 0;
#ifndef __PRE_RAM__

20
src/mainboard/tyan/s8226/fadt.c
View File

@ -49,8 +49,16 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = 0;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
else
fadt->firmware_ctrl = (uintptr_t)facs;
if ((uintptr_t)dsdt > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: DSDT lives above 4G\n");
else
fadt->dsdt = (uintptr_t)dsdt;
/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
fadt->preferred_pm_profile = 0x03;
fadt->sci_int = 9;
@ -103,10 +111,10 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 6;
fadt->x_firmware_ctl_l = (u32) facs;
fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_firmware_ctl_l = ((uintptr_t)facs) & 0xffffffff;
fadt->x_firmware_ctl_h = ((uint64_t)(uintptr_t)facs) >> 32;
fadt->x_dsdt_l = ((uintptr_t)dsdt) & 0xffffffff;
fadt->x_dsdt_h = ((uint64_t)(uintptr_t)dsdt) >> 32;
fadt->x_pm1a_evt_blk.space_id = 1;
fadt->x_pm1a_evt_blk.bit_width = 32;

4
src/mainboard/tyan/s8226/mptable.c
View File

@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
dword = (u32 *)(uintptr_t)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x20, dword);
#ifdef UNUSED_CODE
@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
dword = (u32 *)(uintptr_t)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sr5650, 0x20, dword);
}

2
src/mainboard/tyan/s8226/rd890_cfg.c
View File

@ -109,7 +109,7 @@ static void nb_platform_config(device_t nb_dev, AMD_NB_CONFIG *NbConfigPtr)
* @param[in] *config Northbridge configuration structure pointer.
*
*/
static u32 rd890_callout_entry(u32 func, u32 data, void *config)
static u32 rd890_callout_entry(u32 func, uintptr_t data, void *config)
{
u32 ret = 0;
#ifndef __PRE_RAM__