src: Add missing include <device/pci_ops.h>

Change-Id: Iae73fc1557fb310dacbbf8bc486dc3cc5249d9e7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33526
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/cpu/amd/family_10h-family_15h/fidvid.c

@@ -91,6 +91,7 @@ b.-  prep_fid_change(...)
 
 #include <console/console.h>
 #include <cpu/amd/msr.h>
+#include <device/pci_ops.h>
 #include <inttypes.h>
 #include <northbridge/amd/amdht/AsPsDefs.h>
 

src/northbridge/via/vx900/early_host_bus_ctl.c

@@ -14,6 +14,8 @@
  * GNU General Public License for more details.
  */
 
+#include <device/pci_ops.h>
+
 #include "early_vx900.h"
 
 static void vx900_cpu_bus_preram_setup(void)

src/northbridge/via/vx900/pci_util.c

@@ -15,6 +15,7 @@
  */
 
 #include <console/console.h>
+#include <device/pci_ops.h>
 
 #include "vx900.h"
 

src/soc/intel/quark/acpi.c

@@ -16,6 +16,7 @@
  */
 
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include <soc/acpi.h>
 #include <soc/ramstage.h>
 

src/southbridge/amd/sb800/early_setup.c

@@ -18,6 +18,7 @@
 
 #include <arch/io.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include <reset.h>
 #include <southbridge/amd/common/amd_defs.h>
 #include <southbridge/amd/common/reset.h>

src/southbridge/broadcom/bcm5785/early_setup.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <reset.h>
 #include <southbridge/amd/common/reset.h>
 #include "bcm5785.h"

src/southbridge/nvidia/ck804/early_setup_car.c

@@ -18,6 +18,7 @@
 
 #include <arch/io.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 #include <reset.h>
 #include <southbridge/amd/common/reset.h>
 

src/southbridge/nvidia/mcp55/early_setup_car.c

@@ -18,6 +18,7 @@
 #include <arch/io.h>
 #include <delay.h>
 #include <console/console.h>
+#include <device/pci_ops.h>
 
 #ifdef UNUSED_CODE
 int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);