soc/intel/denverton_ns: Remove __attribute__(())

Change-Id: I9a9926a7298bca0ca5b67a59124b1e0471e179c4
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77729
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes Haouas 2023-09-09 07:58:36 +02:00 committed by Felix Singer
parent c0b35ccb51
commit 27780ab9a6
3 changed files with 3 additions and 3 deletions

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@ -112,7 +112,7 @@ void soc_save_dimm_info(void)
} }
/* Add any mainboard specific information */ /* Add any mainboard specific information */
__attribute__((weak)) void mainboard_add_dimm_info(struct memory_info *mem_info, __weak void mainboard_add_dimm_info(struct memory_info *mem_info,
int channel, int dimm, int channel, int dimm,
int index) int index)
{ {

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@ -133,7 +133,7 @@ struct GPIO_CONFIG {
**/ **/
uint32_t OtherSettings : 2; uint32_t OtherSettings : 2;
uint32_t RsvdBits : 27; ///< Reserved bits for future extension uint32_t RsvdBits : 27; ///< Reserved bits for future extension
} __attribute__((packed)); } __packed;
typedef enum { GpioHardwareDefault = 0x0 } GPIO_HARDWARE_DEFAULT; typedef enum { GpioHardwareDefault = 0x0 } GPIO_HARDWARE_DEFAULT;

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@ -26,7 +26,7 @@ struct chipset_power_state {
uint32_t gen_pmcon_b; uint32_t gen_pmcon_b;
uint32_t gblrst_cause[2]; uint32_t gblrst_cause[2];
uint32_t prev_sleep_state; uint32_t prev_sleep_state;
} __attribute__((packed)); } __packed;
/* Get base address PMC memory mapped registers. */ /* Get base address PMC memory mapped registers. */
uint8_t *pmc_mmio_regs(void); uint8_t *pmc_mmio_regs(void);