soc/intel/denverton_ns: Remove __attribute__(())
Change-Id: I9a9926a7298bca0ca5b67a59124b1e0471e179c4 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77729 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -112,7 +112,7 @@ void soc_save_dimm_info(void)
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}
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}
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/* Add any mainboard specific information */
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/* Add any mainboard specific information */
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__attribute__((weak)) void mainboard_add_dimm_info(struct memory_info *mem_info,
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__weak void mainboard_add_dimm_info(struct memory_info *mem_info,
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int channel, int dimm,
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int channel, int dimm,
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int index)
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int index)
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{
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{
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@ -133,7 +133,7 @@ struct GPIO_CONFIG {
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**/
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**/
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uint32_t OtherSettings : 2;
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uint32_t OtherSettings : 2;
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uint32_t RsvdBits : 27; ///< Reserved bits for future extension
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uint32_t RsvdBits : 27; ///< Reserved bits for future extension
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} __attribute__((packed));
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} __packed;
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typedef enum { GpioHardwareDefault = 0x0 } GPIO_HARDWARE_DEFAULT;
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typedef enum { GpioHardwareDefault = 0x0 } GPIO_HARDWARE_DEFAULT;
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@ -26,7 +26,7 @@ struct chipset_power_state {
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uint32_t gen_pmcon_b;
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uint32_t gen_pmcon_b;
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uint32_t gblrst_cause[2];
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uint32_t gblrst_cause[2];
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uint32_t prev_sleep_state;
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uint32_t prev_sleep_state;
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} __attribute__((packed));
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} __packed;
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/* Get base address PMC memory mapped registers. */
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/* Get base address PMC memory mapped registers. */
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uint8_t *pmc_mmio_regs(void);
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uint8_t *pmc_mmio_regs(void);
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