soc/amd/picasso/acpi: Remove hardcoded FCH IRQ numbers
Modify the FCH ACPI devices to query the PCI IRQ mapping registers for their current IRQ numbers. BUG=b:139429446, b:154756391 TEST=Boot trembyle and see that I2C and UART devices are finally functional. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I8f2035f74240ead4089ff4d503dfbeb447cf8de4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
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1761d33da6
commit
27b6b0ed72
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@ -16,6 +16,21 @@
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PIRG, 0x00000008, /* Index 6: INTG */
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PIRG, 0x00000008, /* Index 6: INTG */
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PIRH, 0x00000008, /* Index 7: INTH */
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PIRH, 0x00000008, /* Index 7: INTH */
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Offset (0x62),
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PGPI, 0x00000008, /* Index 0x62: GPIO */
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Offset (0x70),
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PI20, 0x00000008, /* Index 0x70: I2C0 */
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PI21, 0x00000008, /* Index 0x71: I2C1 */
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PI22, 0x00000008, /* Index 0x72: I2C2 */
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PI23, 0x00000008, /* Index 0x73: I2C3 */
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PUA0, 0x00000008, /* Index 0x74: UART0 */
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PUA1, 0x00000008, /* Index 0x75: UART1 */
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PI24, 0x00000008, /* Index 0x76: I2C4 */
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PI25, 0x00000008, /* Index 0x77: I2C5 */
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PUA2, 0x00000008, /* Index 0x78: UART2 */
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PUA3, 0x00000008, /* Index 0x79: UART3 */
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/* IO-APIC IRQs */
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/* IO-APIC IRQs */
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Offset (0x80),
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Offset (0x80),
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IORA, 0x00000008, /* Index 0x80: INTA */
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IORA, 0x00000008, /* Index 0x80: INTA */
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@ -26,6 +41,21 @@
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IORF, 0x00000008, /* Index 0x85: INTF */
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IORF, 0x00000008, /* Index 0x85: INTF */
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IORG, 0x00000008, /* Index 0x86: INTG */
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IORG, 0x00000008, /* Index 0x86: INTG */
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IORH, 0x00000008, /* Index 0x87: INTH */
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IORH, 0x00000008, /* Index 0x87: INTH */
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Offset (0xE2),
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IGPI, 0x00000008, /* Index 0xE2: GPIO */
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Offset (0xF0),
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II20, 0x00000008, /* Index 0xF0: I2C0 */
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II21, 0x00000008, /* Index 0xF1: I2C1 */
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II22, 0x00000008, /* Index 0xF2: I2C2 */
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II23, 0x00000008, /* Index 0xF3: I2C3 */
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IUA0, 0x00000008, /* Index 0xF4: UART0 */
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IUA1, 0x00000008, /* Index 0xF5: UART1 */
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II24, 0x00000008, /* Index 0xF6: I2C4 */
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II25, 0x00000008, /* Index 0xF7: I2C5 */
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IUA2, 0x00000008, /* Index 0xF8: UART2 */
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IUA3, 0x00000008, /* Index 0xF9: UART3 */
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}
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}
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/* PCI Error control register */
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/* PCI Error control register */
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@ -26,12 +26,30 @@ Device (GPIO)
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Name (_UID, 0)
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Name (_UID, 0)
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Name (_DDN, GPIO_DEVICE_DESC)
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Name (_DDN, GPIO_DEVICE_DESC)
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Name (_CRS, ResourceTemplate()
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Method (_CRS, 0) {
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{
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Name (RBUF, ResourceTemplate() {
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Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
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Interrupt (
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{ 7 }
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ResourceConsumer,
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Memory32Fixed (ReadWrite, 0xFED81500, 0x300)
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Level,
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})
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ActiveLow,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, 0xFED81500, 0x300)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = IGPI
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} Else {
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IRQN = PGPI
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, 0xFED81500, 0x300)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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@ -43,12 +61,33 @@ Device (FUR0)
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{
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{
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Name (_HID, "AMD0020")
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Name (_HID, "AMD0020")
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Name (_UID, 0x0)
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Name (_UID, 0x0)
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Name (_CRS, ResourceTemplate()
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Method (_CRS, 0) {
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{
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Name (RBUF, ResourceTemplate() {
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IRQ (Edge, ActiveHigh, Exclusive) { 10 }
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Interrupt (
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Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
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ResourceConsumer,
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Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
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Edge,
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})
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = IUA0
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} Else {
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IRQN = PUA0
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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Return (0x0F)
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Return (0x0F)
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@ -58,28 +97,69 @@ Device (FUR0)
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Device (FUR1) {
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Device (FUR1) {
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Name (_HID, "AMD0020")
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Name (_HID, "AMD0020")
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Name (_UID, 0x1)
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Name (_UID, 0x1)
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Name (_CRS, ResourceTemplate()
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Method (_CRS, 0) {
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{
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Name (RBUF, ResourceTemplate() {
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IRQ (Edge, ActiveHigh, Exclusive) { 11 }
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Interrupt (
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Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
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ResourceConsumer,
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Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
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Edge,
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})
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = IUA1
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} Else {
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IRQN = PUA1
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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Return (0x0F)
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Return (0x0F)
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}
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}
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}
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}
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Device (FUR2)
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Device (FUR2) {
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{
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Name (_HID, "AMD0020")
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Name (_HID, "AMD0020")
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Name (_UID, 0x0)
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Name (_UID, 0x2)
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Name (_CRS, ResourceTemplate()
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Method (_CRS, 0) {
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{
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Name (RBUF, ResourceTemplate() {
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IRQ (Edge, ActiveHigh, Exclusive) { 15 }
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Interrupt (
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Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
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ResourceConsumer,
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Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
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Edge,
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})
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = IUA2
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} Else {
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IRQN = PUA2
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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Return (0x0F)
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Return (0x0F)
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@ -88,13 +168,34 @@ Device (FUR2)
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Device (FUR3) {
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Device (FUR3) {
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Name (_HID, "AMD0020")
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Name (_HID, "AMD0020")
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Name (_UID, 0x1)
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Name (_UID, 0x3)
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Name (_CRS, ResourceTemplate()
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Method (_CRS, 0) {
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{
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Name (RBUF, ResourceTemplate() {
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IRQ (Edge, ActiveHigh, Exclusive) { 5 }
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Interrupt (
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Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
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ResourceConsumer,
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Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
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Edge,
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})
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = IUA3
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} Else {
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IRQN = PUA3
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
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Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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Return (0x0F)
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Return (0x0F)
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@ -104,11 +205,30 @@ Device (FUR3) {
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Device (I2C2) {
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Device (I2C2) {
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Name (_HID, "AMD0010")
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Name (_HID, "AMD0010")
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Name (_UID, 0x2)
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Name (_UID, 0x2)
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Name (_CRS, ResourceTemplate()
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Method (_CRS, 0) {
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{
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Name (RBUF, ResourceTemplate() {
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IRQ (Edge, ActiveHigh, Exclusive) { 4 }
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Interrupt (
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Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000)
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ResourceConsumer,
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})
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Edge,
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = II22
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} Else {
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IRQN = PI22
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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@ -120,24 +240,64 @@ Device (I2C3)
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{
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{
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Name (_HID, "AMD0010")
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Name (_HID, "AMD0010")
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Name (_UID, 0x3)
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Name (_UID, 0x3)
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Name (_CRS, ResourceTemplate() {
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Method (_CRS, 0) {
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IRQ (Edge, ActiveHigh, Exclusive) { 6 }
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Name (RBUF, ResourceTemplate() {
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Memory32Fixed(ReadWrite, APU_I2C3_BASE, 0x1000)
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Interrupt (
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})
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ResourceConsumer,
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Edge,
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_I2C3_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = II23
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} Else {
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IRQN = PI23
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_I2C3_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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Return (0x0F)
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Return (0x0F)
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}
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}
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}
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}
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Device (I2C4)
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Device (I2C4) {
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{
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Name (_HID, "AMD0010")
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Name (_HID, "AMD0010")
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Name (_UID, 0x4)
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Name (_UID, 0x4)
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Name (_CRS, ResourceTemplate() {
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Method (_CRS, 0) {
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IRQ (Edge, ActiveHigh, Exclusive) { 14 }
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Name (RBUF, ResourceTemplate() {
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Memory32Fixed(ReadWrite, APU_I2C4_BASE, 0x1000)
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Interrupt (
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})
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ResourceConsumer,
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Edge,
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ActiveHigh,
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Exclusive, , , IRQR)
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{ 0 }
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Memory32Fixed (ReadWrite, APU_I2C4_BASE, 0x1000)
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})
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CreateDWordField (RBUF, IRQR._INT, IRQN)
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If (PMOD) {
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IRQN = II24
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} Else {
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IRQN = PI24
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}
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If (IRQN == 0x1f) {
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Return (ResourceTemplate() {
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Memory32Fixed (ReadWrite, APU_I2C4_BASE, 0x1000)
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})
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} Else {
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Return (RBUF)
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}
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}
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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Return (0x0F)
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Return (0x0F)
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@ -149,7 +309,7 @@ Device (MISC)
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Name (_HID, "AMD0040")
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Name (_HID, "AMD0040")
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Name (_UID, 0x3)
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Name (_UID, 0x3)
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Name (_CRS, ResourceTemplate() {
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Name (_CRS, ResourceTemplate() {
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Memory32Fixed(ReadWrite, ACPIMMIO_MISC_BASE, 0x100)
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Memory32Fixed (ReadWrite, ACPIMMIO_MISC_BASE, 0x100)
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})
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})
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Method (_STA, 0x0, NotSerialized)
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Method (_STA, 0x0, NotSerialized)
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{
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{
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