soc/intel/xeon_sp/spr: Create CXL ACPI resources only for
CXL IIO stacks When an IIO stack is connected with CXL cards, its bus range will be divided by a PCI host bridge object and a CXL host bridge object, otherwise, all its range will be owned by the PCI host bridge object. Accordingly, CXL ACPI resources should be only created when the IIO stack is connected with a CXL card. TEST=intel/archercity CRB Change-Id: I6c1b1343991bc73d90a433d959f6618bbf59532f Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80087 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -376,7 +376,9 @@ void uncore_fill_ssdt(const struct device *device)
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if (stack <= IioStack5) { // TYPE_UBOX_IIO
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create_dsdt_iou_pci_resource(socket, stack, ri, stack_enabled);
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create_dsdt_iou_cxl_resource(socket, stack, ri, stack_enabled);
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if (is_iio_cxl_stack_res(ri))
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create_dsdt_iou_cxl_resource(socket, stack, ri,
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stack_enabled);
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create_dsdt_stack_sta(socket, stack, ri, stack_enabled);
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} else if (stack >= IioStack8 && stack <= IioStack11) { // TYPE_DINO
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create_dsdt_dino_resource(socket, stack, ri, stack_enabled);
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