soc/intel/xeon_sp/spr: Create CXL ACPI resources only for

CXL IIO stacks

When an IIO stack is connected with CXL cards, its bus range
will be divided by a PCI host bridge object and a CXL host
bridge object, otherwise, all its range will be owned by the
PCI host bridge object. Accordingly, CXL ACPI resources should
be only created when the IIO stack is connected with a CXL
card.

TEST=intel/archercity CRB

Change-Id: I6c1b1343991bc73d90a433d959f6618bbf59532f
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80087
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shuo Liu 2024-01-19 21:21:21 +08:00 committed by Lean Sheng Tan
parent 2c5f24eee2
commit 27ce0ec2b6
1 changed files with 3 additions and 1 deletions

View File

@ -376,7 +376,9 @@ void uncore_fill_ssdt(const struct device *device)
if (stack <= IioStack5) { // TYPE_UBOX_IIO
create_dsdt_iou_pci_resource(socket, stack, ri, stack_enabled);
create_dsdt_iou_cxl_resource(socket, stack, ri, stack_enabled);
if (is_iio_cxl_stack_res(ri))
create_dsdt_iou_cxl_resource(socket, stack, ri,
stack_enabled);
create_dsdt_stack_sta(socket, stack, ri, stack_enabled);
} else if (stack >= IioStack8 && stack <= IioStack11) { // TYPE_DINO
create_dsdt_dino_resource(socket, stack, ri, stack_enabled);