diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h index 25a564b457..512b0b8c04 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp.h +++ b/src/soc/amd/common/block/include/amdblocks/psp.h @@ -18,7 +18,7 @@ #include #include -#include +#include /* Extra, Special Purpose Registers in the PSP PCI Config Space */ diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h index 563dae09e1..60a6ea22bb 100644 --- a/src/soc/amd/stoneyridge/include/soc/northbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h @@ -18,6 +18,7 @@ #define __PI_STONEYRIDGE_NORTHBRIDGE_H__ #include +#include /* D0F0 - Root Complex */ diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index bf8787c1fc..84db3dd76c 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -14,7 +14,6 @@ */ #include - #include #include #include @@ -36,6 +35,7 @@ #include #include #include +#include /* * Table of devices that need their AOAC registers enabled and waited diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c index 51661d0cfc..f5136ec103 100644 --- a/src/soc/intel/apollolake/graphics.c +++ b/src/soc/intel/apollolake/graphics.c @@ -26,6 +26,7 @@ #include #include #include +#include uintptr_t fsp_soc_get_igd_bar(void) { diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index d2cb589db8..2048c13824 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "chip.h" diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index b9b42810fc..9107b23eb9 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -36,6 +36,7 @@ #include #include #include +#include #define GT_RETRY 1000 enum { diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c index a89dcb31fb..2acfecc5b0 100644 --- a/src/soc/intel/cannonlake/graphics.c +++ b/src/soc/intel/cannonlake/graphics.c @@ -23,6 +23,7 @@ #include #include #include +#include uintptr_t fsp_soc_get_igd_bar(void) { diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c index 35fe8b6236..0fbddf06e9 100644 --- a/src/soc/intel/icelake/graphics.c +++ b/src/soc/intel/icelake/graphics.c @@ -23,6 +23,7 @@ #include #include #include +#include uintptr_t fsp_soc_get_igd_bar(void) { diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 07ee67ab88..f563c11302 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -25,6 +25,7 @@ #include #include #include +#include uintptr_t fsp_soc_get_igd_bar(void) { diff --git a/src/soc/mediatek/common/pll.c b/src/soc/mediatek/common/pll.c index 0968d2f59f..a63fe8927b 100644 --- a/src/soc/mediatek/common/pll.c +++ b/src/soc/mediatek/common/pll.c @@ -16,6 +16,7 @@ #include #include #include +#include #define GENMASK(h, l) (BIT(h + 1) - BIT(l)) diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c index 0b78c3ea64..f8896d391a 100644 --- a/src/soc/mediatek/mt8173/ddp.c +++ b/src/soc/mediatek/mt8173/ddp.c @@ -19,6 +19,7 @@ #include #include #include +#include #define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16) #define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16) diff --git a/src/soc/mediatek/mt8173/pll.c b/src/soc/mediatek/mt8173/pll.c index 7eb12b1282..e1c1bff6d5 100644 --- a/src/soc/mediatek/mt8173/pll.c +++ b/src/soc/mediatek/mt8173/pll.c @@ -16,11 +16,10 @@ #include #include #include -#include - #include #include #include +#include enum mux_id { TOP_AXI_SEL, diff --git a/src/soc/mediatek/mt8173/rtc.c b/src/soc/mediatek/mt8173/rtc.c index 79e5732c2f..9ad4caa89c 100644 --- a/src/soc/mediatek/mt8173/rtc.c +++ b/src/soc/mediatek/mt8173/rtc.c @@ -18,6 +18,7 @@ #include #include #include +#include #define RTC_GPIO_USER_MASK ((1 << 13) - (1 << 8)) diff --git a/src/soc/nvidia/tegra210/dsi.c b/src/soc/nvidia/tegra210/dsi.c index 76054f0156..ae20d44d16 100644 --- a/src/soc/nvidia/tegra210/dsi.c +++ b/src/soc/nvidia/tegra210/dsi.c @@ -12,9 +12,10 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + +#include #include #include -#include #include #include #include @@ -24,14 +25,15 @@ #include #include #include -#include "chip.h" #include #include #include #include #include +#include + +#include "chip.h" #include "jdi_25x18_display/panel-jdi-lpm102a188a.h" -#include struct tegra_mipi_device mipi_device_data[NUM_DSI]; diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h index 1093479d5f..3cb94ce8d3 100644 --- a/src/soc/nvidia/tegra210/include/soc/dma.h +++ b/src/soc/nvidia/tegra210/include/soc/dma.h @@ -19,6 +19,7 @@ #include #include +#include /* * The DMA engine operates on 4 bytes at a time, so make sure any data diff --git a/src/soc/nvidia/tegra210/mipi-phy.c b/src/soc/nvidia/tegra210/mipi-phy.c index 4e6bdf0242..4e56730d3b 100644 --- a/src/soc/nvidia/tegra210/mipi-phy.c +++ b/src/soc/nvidia/tegra210/mipi-phy.c @@ -13,9 +13,7 @@ * GNU General Public License for more details. */ -#include #include - #include #include #include @@ -25,6 +23,7 @@ #include #include #include +#include int mipi_dphy_set_timing(struct tegra_dsi *dsi) { diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index edb052df6b..9310e0cc09 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -26,9 +26,8 @@ #include #include #include -#include -#include #include +#include #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI # define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "TEGRA_SPI: " x) diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h index 482deadfe7..7ecc1eee16 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/clock.h +++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h @@ -34,6 +34,7 @@ #define __IPQ860X_CLOCK_H_ #include +#include /* UART clock @ 7.3728 MHz */ #define UART_DM_CLK_RX_TX_BIT_RATE 0xCC diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c index fa0990b10b..3d7e1614e0 100644 --- a/src/soc/rockchip/common/gpio.c +++ b/src/soc/rockchip/common/gpio.c @@ -20,6 +20,7 @@ #include #include #include +#include static void gpio_set_dir(gpio_t gpio, enum gpio_dir dir) { diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h index f304d8fcd0..43ab7b914f 100644 --- a/src/soc/rockchip/rk3399/include/soc/mipi.h +++ b/src/soc/rockchip/rk3399/include/soc/mipi.h @@ -17,6 +17,7 @@ #define __RK_MIPI_H #include +#include struct rk_mipi_regs { u32 dsi_version; diff --git a/src/soc/rockchip/rk3399/mipi.c b/src/soc/rockchip/rk3399/mipi.c index cc16563c43..1f3f02cbee 100644 --- a/src/soc/rockchip/rk3399/mipi.c +++ b/src/soc/rockchip/rk3399/mipi.c @@ -20,13 +20,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include static struct rk_mipi_dsi rk_mipi[2] = {