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coreboot-kgpe-d16
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vboot: split class in library and stage 

The build system includes a bunch of files into verstage that
also exist in romstage - generic drivers etc.
These create link time conflicts when trying to link both the
verstage copy and romstage copy together in a combined configuration,
so separate "stage" parts (that allow things to run) from "library" parts
(that contain the vboot specifics).

Change-Id: Ieed910fcd642693e5e89e55f3e6801887d94462f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10041
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Patrick Georgi 2015-04-30 14:25:14 +02:00 committed by Patrick Georgi
parent 8ef8afbb38
commit 27ef602fab
12 changed files with 35 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Makefile.inc
View File

@ -64,7 +64,7 @@ subdirs-y += site-local
####################################################################### #######################################################################
# Add source classes and their build options # Add source classes and their build options
classes-y := ramstage romstage bootblock smm smmstub cpu_microcode verstage secmon classes-y := ramstage romstage bootblock smm smmstub cpu_microcode libverstage verstage secmon
# Add dynamic classes for rmodules # Add dynamic classes for rmodules
$(foreach supported_arch,$(ARCH_SUPPORTED), \ $(foreach supported_arch,$(ARCH_SUPPORTED), \
@ -138,6 +138,7 @@ endif
ramstage-c-deps:=$$(OPTION_TABLE_H) ramstage-c-deps:=$$(OPTION_TABLE_H)
romstage-c-deps:=$$(OPTION_TABLE_H) romstage-c-deps:=$$(OPTION_TABLE_H)
libverstage-c-deps:=$$(OPTION_TABLE_H)
verstage-c-deps:=$$(OPTION_TABLE_H) verstage-c-deps:=$$(OPTION_TABLE_H)
bootblock-c-deps:=$$(OPTION_TABLE_H) bootblock-c-deps:=$$(OPTION_TABLE_H)
@ -362,7 +363,7 @@ $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h
@printf " CC $(subst $(obj)/,,$(@))\n" @printf " CC $(subst $(obj)/,,$(@))\n"
$(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $< $(CC_bootblock) -MMD $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) $(bootblock-c-ccopts) -c -o $@ $<
$(objgenerated)/libverstage.a: $$(verstage-objs) $(objgenerated)/libverstage.a: $$(libverstage-objs)
rm -f $@ rm -f $@
ar rcsT $@ $^ ar rcsT $@ $^

4
src/arch/arm/Makefile.inc
View File

@ -73,9 +73,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM
ifeq ($(CONFIG_ARCH_VERSTAGE_ARM),y) ifeq ($(CONFIG_ARCH_VERSTAGE_ARM),y)
$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $$(verstage-objs) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
@printf " LINK $(subst $(obj)/,,$(@))\n" @printf " LINK $(subst $(obj)/,,$(@))\n"
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(objgenerated)/libverstage.a --end-group $(LD_verstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld --start-group $(objgenerated)/libverstage.a $$(verstage-objs) --end-group
verstage-y += div0.c verstage-y += div0.c
verstage-y += eabi_compat.c verstage-y += eabi_compat.c

2
src/arch/arm/armv4/Makefile.inc
View File

@ -45,6 +45,8 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARMV4
################################################################################ ################################################################################
ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV4),y) ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV4),y)
libverstage-c-ccopts += $(armv4_flags)
libverstage-S-ccopts += $(armv4_flags)
verstage-c-ccopts += $(armv4_flags) verstage-c-ccopts += $(armv4_flags)
verstage-S-ccopts += $(armv4_flags) verstage-S-ccopts += $(armv4_flags)

4
src/arch/arm/armv7/Makefile.inc
View File

@ -66,6 +66,8 @@ bootblock-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
################################################################################ ################################################################################
ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7),y) ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7),y)
libverstage-c-ccopts += $(armv7-a_flags)
libverstage-S-ccopts += $(armv7-a_asm_flags)
verstage-c-ccopts += $(armv7-a_flags) verstage-c-ccopts += $(armv7-a_flags)
verstage-S-ccopts += $(armv7-a_asm_flags) verstage-S-ccopts += $(armv7-a_asm_flags)
@ -76,6 +78,8 @@ verstage-y += exception_asm.S
verstage-y += mmu.c verstage-y += mmu.c
else ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7_M),y) else ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7_M),y)
libverstage-c-ccopts += $(armv7-m_flags)
libverstage-S-ccopts += $(armv7-m_asm_flags)
verstage-c-ccopts += $(armv7-m_flags) verstage-c-ccopts += $(armv7-m_flags)
verstage-S-ccopts += $(armv7-m_asm_flags) verstage-S-ccopts += $(armv7-m_asm_flags)

4
src/arch/arm64/Makefile.inc
View File

@ -84,9 +84,9 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM64
ifeq ($(CONFIG_ARCH_VERSTAGE_ARM64),y) ifeq ($(CONFIG_ARCH_VERSTAGE_ARM64),y)
$(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(obj)/config.h $(objcbfs)/verstage.debug: $(objgenerated)/libverstage.a $$(verstage-objs) $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(obj)/config.h
@printf " LINK $(subst $(obj)/,,$(@))\n" @printf " LINK $(subst $(obj)/,,$(@))\n"
$(LD_verstage) --gc-sections -static -o $@ -L$(obj) --start-group $(objgenerated)/libverstage.a --end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld $(LD_verstage) --gc-sections -static -o $@ -L$(obj) --start-group $(objgenerated)/libverstage.a $$(verstage-objs)--end-group -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld
verstage-$(CONFIG_EARLY_CONSOLE) += early_console.c verstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
verstage-y += div0.c verstage-y += div0.c

2
src/arch/arm64/armv8/Makefile.inc
View File

@ -56,6 +56,8 @@ verstage-y += cpu.S
verstage-y += cache_helpers.S verstage-y += cache_helpers.S
verstage-y += exception.c verstage-y += exception.c
libverstage-c-ccopts += $(armv8_flags)
libverstage-S-ccopts += $(armv8_asm_flags)
verstage-c-ccopts += $(armv8_flags) verstage-c-ccopts += $(armv8_flags)
verstage-S-ccopts += $(armv8_asm_flags) verstage-S-ccopts += $(armv8_asm_flags)

4
src/drivers/i2c/ww_ring/Makefile.inc
View File

@ -1,2 +1,2 @@
verstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring.c libverstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring.c
verstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring_programs.c libverstage-$(CONFIG_DRIVERS_I2C_WW_RING) += ww_ring_programs.c

4
src/lib/Makefile.inc
View File

@ -39,9 +39,9 @@ verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
ifeq ($(MOCK_TPM),1) ifeq ($(MOCK_TPM),1)
verstage-y += mocked_tlcl.c libverstage-y += mocked_tlcl.c
else else
verstage-y += tlcl.c libverstage-y += tlcl.c
endif endif
verstage-$(CONFIG_GENERIC_UDELAY) += timer.c verstage-$(CONFIG_GENERIC_UDELAY) += timer.c

8
src/soc/qualcomm/ipq806x/Makefile.inc
View File

@ -27,10 +27,10 @@ bootblock-$(CONFIG_DRIVERS_UART) += uart.c
verstage-y += clock.c verstage-y += clock.c
verstage-y += gpio.c verstage-y += gpio.c
verstage-y += gsbi.c libverstage-y += gsbi.c
verstage-y += i2c.c libverstage-y += i2c.c
verstage-y += qup.c libverstage-y += qup.c
verstage-y += spi.c libverstage-y += spi.c
verstage-y += timer.c verstage-y += timer.c
verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c verstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c

2
src/soc/rockchip/rk3288/Makefile.inc
View File

@ -39,7 +39,7 @@ verstage-y += timer.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c verstage-$(CONFIG_DRIVERS_UART) += uart.c
verstage-y += gpio.c verstage-y += gpio.c
verstage-y += clock.c verstage-y += clock.c
verstage-y += crypto.c libverstage-y += crypto.c
verstage-y += i2c.c verstage-y += i2c.c
verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c

14
src/vendorcode/google/chromeos/vboot2/Makefile.inc
View File

@ -17,7 +17,7 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
## ##
verstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__ libverstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__
bootblock-y += ../vboot_common.c bootblock-y += ../vboot_common.c
verstage-y += ../vboot_common.c verstage-y += ../vboot_common.c
@ -25,14 +25,14 @@ romstage-y += ../vboot_common.c
ramstage-y += ../vboot_common.c ramstage-y += ../vboot_common.c
bootblock-y += verstub.c bootblock-y += verstub.c
verstage-y += verstub.c libverstage-y += verstub.c
bootblock-y += common.c bootblock-y += common.c
verstage-y += verstage.c libverstage-y += verstage.c
verstage-y += common.c verstage-y += common.c
ifeq (${CONFIG_VBOOT2_MOCK_SECDATA},y) ifeq (${CONFIG_VBOOT2_MOCK_SECDATA},y)
verstage-y += secdata_mock.c libverstage-y += secdata_mock.c
else else
verstage-y += antirollback.c libverstage-y += antirollback.c
endif endif
romstage-y += vboot_handoff.c common.c romstage-y += vboot_handoff.c common.c
@ -41,7 +41,7 @@ verstage-y += verstage.ld
VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-VERSTAGE-y)) VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-VERSTAGE-y))
VB2_LIB = $(obj)/external/vboot_reference/vboot_fw20.a VB2_LIB = $(obj)/external/vboot_reference/vboot_fw20.a
VBOOT_CFLAGS += $(patsubst -I%,-I$(top)/%,$(filter-out -include $(src)/include/kconfig.h, $(CPPFLAGS_verstage))) VBOOT_CFLAGS += $(patsubst -I%,-I$(top)/%,$(filter-out -include $(src)/include/kconfig.h, $(CPPFLAGS_verstage)))
VBOOT_CFLAGS += $(verstage-c-ccopts) VBOOT_CFLAGS += $(libverstage-c-ccopts)
VBOOT_CFLAGS += -include $(top)/src/include/kconfig.h -Wno-missing-prototypes VBOOT_CFLAGS += -include $(top)/src/include/kconfig.h -Wno-missing-prototypes
VBOOT_CFLAGS += -DVBOOT_DEBUG VBOOT_CFLAGS += -DVBOOT_DEBUG
@ -55,7 +55,7 @@ $(VB2_LIB): $(obj)/config.h
V=$(V) \ V=$(V) \
fwlib20 fwlib20
verstage-srcs += $(VB2_LIB) libverstage-srcs += $(VB2_LIB)
ifeq ($(CONFIG_SEPARATE_VERSTAGE),y) ifeq ($(CONFIG_SEPARATE_VERSTAGE),y)
cbfs-files-y += $(call strip_quotes,$(CONFIG_CBFS_PREFIX))/verstage cbfs-files-y += $(call strip_quotes,$(CONFIG_CBFS_PREFIX))/verstage

6
toolchain.inc
View File

@ -51,7 +51,8 @@ HOSTCXX:=CCC_CXX="$(HOSTCXX)" $(CXX)
ROMCC=CCC_CC="$(ROMCC_BIN)" $(CC) ROMCC=CCC_CC="$(ROMCC_BIN)" $(CC)
endif endif
COREBOOT_STANDARD_STAGES := bootblock verstage romstage ramstage COREBOOT_STANDARD_STAGES := bootblock libverstage verstage romstage ramstage
MAP-libverstage := verstage
ARCHDIR-i386 := x86 ARCHDIR-i386 := x86
ARCHDIR-x86_32 := x86 ARCHDIR-x86_32 := x86
@ -81,8 +82,9 @@ toolchain_to_dir = \
# This step is essential for initializing the toolchain for coreboot standard # This step is essential for initializing the toolchain for coreboot standard
# stages i.e. bootblock, romstage and ramstage, since it acts as the second # stages i.e. bootblock, romstage and ramstage, since it acts as the second
# parameter to create_class_compiler below in init_standard_toolchain # parameter to create_class_compiler below in init_standard_toolchain
map_stage = $(strip $(if $(MAP-$(1)),$(MAP-$(1)),$(1)))
set_stage_toolchain= \ set_stage_toolchain= \
$(foreach arch,$(ARCH_SUPPORTED),$(eval ARCH-$(1)-$($(shell echo CONFIG_ARCH_$(1)_$(arch) | tr '[:lower:]' '[:upper:]')) := $(arch))) $(foreach arch,$(ARCH_SUPPORTED),$(eval ARCH-$(1)-$($(shell echo CONFIG_ARCH_$(call map_stage,$(1))_$(arch) | tr '[:lower:]' '[:upper:]')) := $(arch)))
# create_class_compiler: Used to create compiler tool set for # create_class_compiler: Used to create compiler tool set for
# special classes # special classes