soc/intel/alderlake/romstage: Skip GPIO configuration from FSP
Set GpioOverride UPD to 1 to skip GPIO configuration in FSP phases TEST=Able to build and boot ADLRVP to OS. Change-Id: Ie965a85d9da9b6a23b385536313b852e66909cf4 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46696 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -157,6 +157,9 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
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m_cfg->CpuPcieRpEnableMask = is_dev_enabled(dev);
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m_cfg->TmeEnable = CONFIG(INTEL_TME);
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/* Skip GPIO configuration from FSP */
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m_cfg->GpioOverride = 0x1;
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}
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void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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