GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common/block/lpc: Add support to not clear port80 enable 

SMU locks up sometimes if the port80 enable bit is cleared in the ESPI
Decode register. Add a config to choose between clearing the entire ESPI
Decode Register vs retaining the port80 enable bit.

BUG=None
TEST=Build and boot to OS in Skyrim.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Ia5ee012ac4858d6dd43827274169edf622a70489
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63118
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Karthikeyan Ramasubramanian 2022-03-25 10:21:03 -06:00 committed by Felix Held
parent 2c3c5898f3
commit 284831e445
2 changed files with 12 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/soc/amd/common/block/lpc/Kconfig
View File

@ -42,3 +42,11 @@ config SOC_AMD_COMMON_BLOCK_USE_ESPI
help help
Select this option if mainboard uses eSPI instead of LPC (if supported Select this option if mainboard uses eSPI instead of LPC (if supported
by platform). by platform).
config SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
bool
depends on SOC_AMD_COMMON_BLOCK_USE_ESPI
help
SMU will lock up at times if the port80h enable bit is cleared. Select
this option to retain the port80 enable bit while clearing other enable
bits in the ESPI Decode register.

5
src/soc/amd/common/block/lpc/espi_util.c
View File

@ -139,7 +139,10 @@ static void espi_clear_decodes(void)
unsigned int idx; unsigned int idx;
/* First turn off all enable bits, then zero base, range, and size registers */ /* First turn off all enable bits, then zero base, range, and size registers */
espi_write16(ESPI_DECODE, 0); if (CONFIG(SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN))
espi_write16(ESPI_DECODE, (espi_read16(ESPI_DECODE) & ESPI_DECODE_IO_0x80_EN));
else
espi_write16(ESPI_DECODE, 0);
for (idx = 0; idx < ESPI_GENERIC_IO_WIN_COUNT; idx++) { for (idx = 0; idx < ESPI_GENERIC_IO_WIN_COUNT; idx++) {
espi_write16(espi_io_range_base_reg(idx), 0); espi_write16(espi_io_range_base_reg(idx), 0);