GNUBoot/coreboot-kgpe-d16
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cpu/amd: Reformat code

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Most of these changes are suggested by clang-format(13.0-54) tool on
Debian testing.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Ie4fe0e872e94f38079945970848fefd153ab7cb5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
This commit is contained in:
Elyes Haouas 2022-05-29 15:44:11 +02:00 committed by Felix Held
parent a3214c050e
commit 287048a500
7 changed files with 55 additions and 58 deletions
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4
src/cpu/amd/mtrr/amd_mtrr.c
View file

@ -16,8 +16,8 @@ void add_uma_resource_below_tolm(struct device *nb, int idx)
uint32_t uma_base = top_of_cacheable;
uint32_t uma_size = topmem - top_of_cacheable;
printk(BIOS_INFO, "%s: uma size 0x%08x, memory start 0x%08x\n",
__func__, uma_size, uma_base);
printk(BIOS_INFO, "%s: uma size 0x%08x, memory start 0x%08x\n", __func__, uma_size,
uma_base);
uma_resource_kb(nb, idx, uma_base / KiB, uma_size / KiB);
}

6
src/cpu/amd/pi/00730F01/update_microcode.c
View file

@ -76,8 +76,7 @@ static void apply_microcode_patch(const struct microcode *m)
wrmsr(MSR_PATCH_LOADER, msr);
printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n",
m->patch_id);
printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n", m->patch_id);
msr = rdmsr(IA32_BIOS_SIGN_ID);
new_patch_id = msr.lo;
@ -122,8 +121,7 @@ void amd_update_microcode_from_cbfs(void)
return;
}
if (ucode_len > F16H_MPB_MAX_SIZE ||
ucode_len < F16H_MPB_DATA_OFFSET) {
if (ucode_len > F16H_MPB_MAX_SIZE || ucode_len < F16H_MPB_DATA_OFFSET) {
printk(BIOS_DEBUG, "microcode file invalid. Skipping updates.\n");
return;
}

3
src/cpu/amd/smm/smm_init.c
View file

@ -43,8 +43,7 @@ void smm_init(void)
enable_cache();
/* copy the real SMM handler */
memcpy((void *)SMM_BASE, _binary_smm_start,
_binary_smm_end - _binary_smm_start);
memcpy((void *)SMM_BASE, _binary_smm_start, _binary_smm_end - _binary_smm_start);
wbinvd();
disable_cache();