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mb/google/dedede/var/cret: Update DPTF parameters 

Update DPTF parameters from internal thermal team and Intel suggestion.

BUG=b:198249129
BRANCH=dedede
TEST=emerge-dedede coreboot

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I25d3909144d6e38d7a6eb859d33585c319a84b04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57404
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Paul Yang <paul.f.yang@intel.corp-partner.google.com>
Reviewed-by: Shou-Chieh Hsu <shouchieh@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Dtrain Hsu 2021-09-06 16:23:51 +08:00 committed by Felix Held
parent 8557613617
commit 287a944d0b
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/google/dedede/variants/cret/overridetree.cb
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@ -68,9 +68,9 @@ chip soc/intel/jasperlake
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)
[0] = DPTF_CRITICAL(CPU, 120, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 120, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 120, SHUTDOWN)
}"
## Power Limits Control