hp/pavilion_m6_1035dx/cmos.layout: Remove unused options

Some of the options in cmos.layout date back to the K8 days, and have
not been used anywhere else, but K8. This makes nvramtool expose a
very confusing set of options, most of which have no effect. Clean up
the layout before it gets forked again.

TEST: Booted linux, and checked 'nvramtool -a' output.

Change-Id: I1c5f83790ec89ced4dcf954e4949f8554aef6087
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8378
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
This commit is contained in:
Alexandru Gagniuc 2015-02-06 16:39:30 -06:00
parent a555f749cb
commit 28a269abbd
1 changed files with 16 additions and 51 deletions

View File

@ -1,42 +1,24 @@
#*****************************************************************************
#
# This file is part of the coreboot project.
#
# Copyright (C) 2012 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#*****************************************************************************
entries entries
#start-bit length config config-ID name
# RTC_BOOT_BYTE (coreboot hardcoded)
0 384 r 0 reserved_memory 0 384 r 0 reserved_memory
384 1 e 4 boot_option 384 1 e 4 boot_option
385 1 e 4 last_boot 385 1 e 4 last_boot
388 4 r 0 reboot_bits 388 4 r 0 reboot_bits
392 3 e 5 baud_rate
395 1 e 1 hw_scrubber # southbridge/amd/agesa/hudson should use this but it doesn't
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
# The only option that is actually used
412 4 e 6 debug_level 412 4 e 6 debug_level
440 4 e 9 slow_cpu
# southbridge/amd/agesa/hudson should use this but it doesn't
444 1 e 1 nmi 444 1 e 1 nmi
445 1 e 1 iommu
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum 984 16 h 0 check_sum
# Reserve the extended AMD configuration registers # Reserve the extended AMD configuration registers
1000 24 r 0 amd_reserved 1000 24 r 0 amd_reserved
@ -45,34 +27,17 @@ enumerations
#ID value text #ID value text
1 0 Disable 1 0 Disable
1 1 Enable 1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback 4 0 Fallback
4 1 Normal 4 1 Normal
5 0 115200 6 1 Emergency
5 1 57600 6 2 Alert
5 2 38400 6 3 Critical
5 3 19200 6 4 Error
5 4 9600 6 5 Warning
5 5 4800
5 6 2400
5 7 1200
6 6 Notice 6 6 Notice
6 7 Info 6 7 Info
6 8 Debug 6 8 Debug
6 9 Spew 6 9 Spew
8 0 400Mhz
8 1 333Mhz
8 2 266Mhz
8 3 200Mhz
9 0 off
9 1 87.5%
9 2 75.0%
9 3 62.5%
9 4 50.0%
9 5 37.5%
9 6 25.0%
9 7 12.5%
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