soc/ucb/riscv: select BOOTBLOCK_CONSOLE
Change-Id: I847d7686dec04e9fae7db13d53adc8ca32c56f3a Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/16158 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -4,6 +4,7 @@ config SOC_UCB_RISCV
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select ARCH_VERSTAGE_RISCV
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select ARCH_ROMSTAGE_RISCV
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select ARCH_RAMSTAGE_RISCV
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select BOOTBLOCK_CONSOLE
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bool
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default n
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