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amd/gardenia: Update ACPI routing 

Reduce the Bettong devices and match up the comments to the
northbridge.

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from e7c38571be6406453640d671210b2074a91f162e)

Change-Id: I53adff741f5cf2bd75c37421949bd30f214f5692
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/17849
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson 2016-10-16 16:14:57 -04:00 committed by Martin Roth
parent a4facf80f2
commit 28cc06fe0e
1 changed files with 14 additions and 95 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

109
src/mainboard/amd/gardenia/acpi/routing.asl
View File

@ -1,7 +1,7 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2015 Advanced Micro Devices, Inc. * Copyright (C) 2015, 2016 Advanced Micro Devices, Inc.
* Copyright (C) 2013 Sage Electronic Engineering, LLC * Copyright (C) 2013 Sage Electronic Engineering, LLC
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@ -25,9 +25,9 @@ DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
/* Routing is in System Bus scope */ /* Routing is in System Bus scope */
Name(PR0, Package(){ Name(PR0, Package(){
/* NB devices */ /* NB devices */
/* Bus 0, Dev 0 - F16 Host Controller */ /* Bus 0, Dev 0 - F15 Host Controller */
/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */ /* Bus 0, Dev 1, Func 0 - PCI Bridge for Internal Graphics(IGP) */
/* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */ /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */
Package(){0x0001FFFF, 0, INTB, 0 }, Package(){0x0001FFFF, 0, INTB, 0 },
Package(){0x0001FFFF, 1, INTC, 0 }, Package(){0x0001FFFF, 1, INTC, 0 },
@ -40,24 +40,17 @@ Name(PR0, Package(){
Package(){0x0002FFFF, 3, INTB, 0 }, Package(){0x0002FFFF, 3, INTB, 0 },
/* FCH devices */ /* FCH devices */
/* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ /* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */
Package(){0x0014FFFF, 0, INTA, 0 }, Package(){0x0014FFFF, 0, INTA, 0 },
Package(){0x0014FFFF, 1, INTB, 0 }, Package(){0x0014FFFF, 1, INTB, 0 },
Package(){0x0014FFFF, 2, INTC, 0 }, Package(){0x0014FFFF, 2, INTC, 0 },
Package(){0x0014FFFF, 3, INTD, 0 }, Package(){0x0014FFFF, 3, INTD, 0 },
/* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */ /* Bus 0, Dev 18 Func 0 - USB: EHCI */
/* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
Package(){0x0012FFFF, 0, INTC, 0 }, Package(){0x0012FFFF, 0, INTC, 0 },
Package(){0x0012FFFF, 1, INTB, 0 }, Package(){0x0012FFFF, 1, INTB, 0 },
Package(){0x0013FFFF, 0, INTC, 0 }, /* Bus 0, Dev 10 Func 0 - USB: xHCI */
Package(){0x0013FFFF, 1, INTB, 0 },
Package(){0x0016FFFF, 0, INTC, 0 },
Package(){0x0016FFFF, 1, INTB, 0 },
/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
Package(){0x0010FFFF, 0, INTC, 0 }, Package(){0x0010FFFF, 0, INTC, 0 },
Package(){0x0010FFFF, 1, INTB, 0 }, Package(){0x0010FFFF, 1, INTB, 0 },
@ -80,59 +73,27 @@ Name(APR0, Package(){
Package(){0x0002FFFF, 2, 0, 46 }, Package(){0x0002FFFF, 2, 0, 46 },
Package(){0x0002FFFF, 3, 0, 47 }, Package(){0x0002FFFF, 3, 0, 47 },
Package(){0x0003FFFF, 0, 0, 49 },
Package(){0x0003FFFF, 1, 0, 50 },
Package(){0x0003FFFF, 2, 0, 51 },
Package(){0x0003FFFF, 3, 0, 52 },
Package(){0x0008FFFF, 0, 0, 35 },
Package(){0x0008FFFF, 1, 0, 32 },
Package(){0x0008FFFF, 2, 0, 33 },
Package(){0x0008FFFF, 3, 0, 34 },
/* SB devices in APIC mode */ /* SB devices in APIC mode */
/* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ /* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */
Package(){0x0014FFFF, 0, 0, 16 }, Package(){0x0014FFFF, 0, 0, 16 },
Package(){0x0014FFFF, 1, 0, 17 }, Package(){0x0014FFFF, 1, 0, 17 },
Package(){0x0014FFFF, 2, 0, 18 }, Package(){0x0014FFFF, 2, 0, 18 },
Package(){0x0014FFFF, 3, 0, 19 }, Package(){0x0014FFFF, 3, 0, 19 },
/* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */ /* Bus 0, Dev 18 Func 0 - USB: EHCI */
/* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
Package(){0x0012FFFF, 0, 0, 18 }, Package(){0x0012FFFF, 0, 0, 18 },
Package(){0x0012FFFF, 1, 0, 17 }, Package(){0x0012FFFF, 1, 0, 17 },
Package(){0x0013FFFF, 0, 0, 18 }, /* Bus 0, Dev 10 Func 0 - USB: xHCI */
Package(){0x0013FFFF, 1, 0, 17 },
/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
Package(){0x0010FFFF, 0, 0, 18}, Package(){0x0010FFFF, 0, 0, 18},
Package(){0x0010FFFF, 1, 0, 17}, Package(){0x0010FFFF, 1, 0, 17},
/* Bus 0, Dev 17 - SATA controller */ /* Bus 0, Dev 17 - SATA controller */
Package(){0x0011FFFF, 0, 0, 19 }, Package(){0x0011FFFF, 0, 0, 19 },
/* Bus 0, Dev 9, Func 2 - HDAudio */
Package(){0x0009FFFF, 0, 0, 39 },
Package(){0x0009FFFF, 1, 0, 36 },
Package(){0x0009FFFF, 2, 0, 37 },
Package(){0x0009FFFF, 3, 0, 38 },
}) })
Name(PS2, Package(){
Package(){0x0000FFFF, 0, INTC, 0 },
Package(){0x0000FFFF, 1, INTD, 0 },
Package(){0x0000FFFF, 2, INTA, 0 },
Package(){0x0000FFFF, 3, INTB, 0 },
})
Name(APS2, Package(){
Package(){0x0000FFFF, 0, 0, 18 },
Package(){0x0000FFFF, 1, 0, 19 },
Package(){0x0000FFFF, 2, 0, 16 },
Package(){0x0000FFFF, 3, 0, 17 },
})
/* GFX */ /* GPP 0 */
Name(PS4, Package(){ Name(PS4, Package(){
Package(){0x0000FFFF, 0, INTA, 0 }, Package(){0x0000FFFF, 0, INTA, 0 },
Package(){0x0000FFFF, 1, INTB, 0 }, Package(){0x0000FFFF, 1, INTB, 0 },
@ -147,7 +108,7 @@ Name(APS4, Package(){
Package(){0x0000FFFF, 3, 0, 27 }, Package(){0x0000FFFF, 3, 0, 27 },
}) })
/* GPP 0 */ /* GPP 1 */
Name(PS5, Package(){ Name(PS5, Package(){
Package(){0x0000FFFF, 0, INTB, 0 }, Package(){0x0000FFFF, 0, INTB, 0 },
Package(){0x0000FFFF, 1, INTC, 0 }, Package(){0x0000FFFF, 1, INTC, 0 },
@ -161,7 +122,7 @@ Name(APS5, Package(){
Package(){0x0000FFFF, 3, 0, 31 }, Package(){0x0000FFFF, 3, 0, 31 },
}) })
/* GPP 1 */ /* GPP 2 */
Name(PS6, Package(){ Name(PS6, Package(){
Package(){0x0000FFFF, 0, INTC, 0 }, Package(){0x0000FFFF, 0, INTC, 0 },
Package(){0x0000FFFF, 1, INTD, 0 }, Package(){0x0000FFFF, 1, INTD, 0 },
@ -175,7 +136,7 @@ Name(APS6, Package(){
Package(){0x0000FFFF, 3, 0, 35 }, Package(){0x0000FFFF, 3, 0, 35 },
}) })
/* GPP 2 */ /* GPP 3 */
Name(PS7, Package(){ Name(PS7, Package(){
Package(){0x0000FFFF, 0, INTD, 0 }, Package(){0x0000FFFF, 0, INTD, 0 },
Package(){0x0000FFFF, 1, INTA, 0 }, Package(){0x0000FFFF, 1, INTA, 0 },
@ -189,7 +150,7 @@ Name(APS7, Package(){
Package(){0x0000FFFF, 3, 0, 39 }, Package(){0x0000FFFF, 3, 0, 39 },
}) })
/* GPP 3 */ /* GPP 4 */
Name(PS8, Package(){ Name(PS8, Package(){
Package(){0x0000FFFF, 0, INTA, 0 }, Package(){0x0000FFFF, 0, INTA, 0 },
Package(){0x0000FFFF, 1, INTB, 0 }, Package(){0x0000FFFF, 1, INTB, 0 },
@ -202,45 +163,3 @@ Name(APS8, Package(){
Package(){0x0000FFFF, 2, 0, 42 }, Package(){0x0000FFFF, 2, 0, 42 },
Package(){0x0000FFFF, 3, 0, 43 }, Package(){0x0000FFFF, 3, 0, 43 },
}) })
/* GFX 2 */
Name(PSA, Package(){
Package(){0x0000FFFF, 0, INTA, 0 },
Package(){0x0000FFFF, 1, INTB, 0 },
Package(){0x0000FFFF, 2, INTC, 0 },
Package(){0x0000FFFF, 3, INTD, 0 },
})
Name(APSA, Package(){
Package(){0x0000FFFF, 0, 0, 52 },
Package(){0x0000FFFF, 1, 0, 53 },
Package(){0x0000FFFF, 2, 0, 54 },
Package(){0x0000FFFF, 3, 0, 55 },
})
/* GFX 3 */
Name(PSB, Package(){
Package(){0x0000FFFF, 0, INTA, 0 },
Package(){0x0000FFFF, 1, INTB, 0 },
Package(){0x0000FFFF, 2, INTC, 0 },
Package(){0x0000FFFF, 3, INTD, 0 },
})
Name(APSB, Package(){
Package(){0x0000FFFF, 0, 0, 27 },
Package(){0x0000FFFF, 1, 0, 24 },
Package(){0x0000FFFF, 2, 0, 25 },
Package(){0x0000FFFF, 3, 0, 26 },
})
/* GFX 4 */
Name(PSC, Package(){
Package(){0x0000FFFF, 0, INTA, 0 },
Package(){0x0000FFFF, 1, INTB, 0 },
Package(){0x0000FFFF, 2, INTC, 0 },
Package(){0x0000FFFF, 3, INTD, 0 },
})
Name(APSC, Package(){
Package(){0x0000FFFF, 0, 0, 31 },
Package(){0x0000FFFF, 1, 0, 28 },
Package(){0x0000FFFF, 2, 0, 29 },
Package(){0x0000FFFF, 3, 0, 30 },
})