sb/intel/i82801ix: Use macros for LPC_EN
Taken directly from i82801jx code. Tested with BUILD_TIMELESS=1, Roda RK9 does not change. Change-Id: I0a5dc274e0058144e6e7f734c848b6b5962cba85 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -27,7 +27,10 @@ void i82801ix_lpc_setup(void)
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* - 0x200-0x207 GAMEL
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* - 0x200-0x207 GAMEL
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*/
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*/
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pci_write_config16(d31f0, D31F0_LPC_IODEC, 0x0010);
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pci_write_config16(d31f0, D31F0_LPC_IODEC, 0x0010);
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pci_write_config16(d31f0, D31F0_LPC_EN, 0x3f0f);
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pci_write_config16(d31f0, D31F0_LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN
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| MC_LPC_EN | KBC_LPC_EN | GAMEH_LPC_EN
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| GAMEL_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
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| COMB_LPC_EN | COMA_LPC_EN);
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/* Set up generic decode ranges */
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/* Set up generic decode ranges */
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if (!dev || !dev->chip_info)
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if (!dev || !dev->chip_info)
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@ -55,6 +55,16 @@
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#define D31F0_PIRQH_ROUT 0x6b
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#define D31F0_PIRQH_ROUT 0x6b
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#define D31F0_LPC_IODEC 0x80
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#define D31F0_LPC_IODEC 0x80
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#define D31F0_LPC_EN 0x82
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#define D31F0_LPC_EN 0x82
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#define CNF2_LPC_EN (1 << 13) /* 0x4e/0x4f */
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#define CNF1_LPC_EN (1 << 12) /* 0x2e/0x2f */
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#define MC_LPC_EN (1 << 11) /* 0x62/0x66 */
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#define KBC_LPC_EN (1 << 10) /* 0x60/0x64 */
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#define GAMEH_LPC_EN (1 << 9) /* 0x208/0x20f */
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#define GAMEL_LPC_EN (1 << 8) /* 0x200/0x207 */
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#define FDD_LPC_EN (1 << 3) /* LPC_IO_DEC[12] */
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#define LPT_LPC_EN (1 << 2) /* LPC_IO_DEC[9:8] */
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#define COMB_LPC_EN (1 << 1) /* LPC_IO_DEC[6:4] */
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#define COMA_LPC_EN (1 << 0) /* LPC_IO_DEC[2:0] */
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#define D31F0_GEN1_DEC 0x84
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#define D31F0_GEN1_DEC 0x84
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#define D31F0_GEN2_DEC 0x88
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#define D31F0_GEN2_DEC 0x88
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#define D31F0_GEN3_DEC 0x8c
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#define D31F0_GEN3_DEC 0x8c
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