GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arch/x86/*.ld: Don't use CPP to include linker scripts 

This makes inspection of linker scripts in the build dir a little
easier.

Change-Id: I509faa4cee2c9f066f4e20f6038349e1165a619a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Arthur Heymans 2022-05-15 21:46:44 +02:00 committed by Felix Held
parent 3e914d3726
commit 28de28d8de
3 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/arch/x86/Makefile.inc
View File

@ -93,6 +93,8 @@ bootblock-$(CONFIG_BOOTBLOCK_NORMAL) += bootblock_normal.c
bootblock-y += gdt_init.S bootblock-y += gdt_init.S
bootblock-y += id.S bootblock-y += id.S
bootblock-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c bootblock-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
bootblock-y += bootblock.ld
bootblock-y += car.ld
$(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
@ -142,6 +144,8 @@ verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c
verstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c verstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
verstage-y += car.ld
verstage-libs ?= verstage-libs ?=
ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32),y) ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32),y)
@ -177,6 +181,7 @@ romstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
romstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c romstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
romstage-$(CONFIG_COOP_MULTITASKING) += thread.c romstage-$(CONFIG_COOP_MULTITASKING) += thread.c
romstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S romstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
romstage-y += car.ld
romstage-srcs += $(wildcard $(src)/mainboard/$(MAINBOARDDIR)/romstage.c) romstage-srcs += $(wildcard $(src)/mainboard/$(MAINBOARDDIR)/romstage.c)
romstage-libs ?= romstage-libs ?=

1
src/arch/x86/car.ld
View File

@ -2,6 +2,7 @@
/* CACHE_ROM_SIZE defined here. */ /* CACHE_ROM_SIZE defined here. */
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <memlayout.h>
/* This file is included inside a SECTIONS block */ /* This file is included inside a SECTIONS block */
. = CONFIG_DCACHE_RAM_BASE; . = CONFIG_DCACHE_RAM_BASE;

8
src/arch/x86/memlayout.ld
View File

@ -21,16 +21,16 @@ SECTIONS
* Link at 32MiB address and rely on cbfstool to relocate to XIP. */ * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M) ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
#include "car.ld" INCLUDE "romstage/arch/x86/car.ld"
#elif ENV_SEPARATE_VERSTAGE #elif ENV_SEPARATE_VERSTAGE
/* The 1M size is not allocated. It's just for basic size checking. /* The 1M size is not allocated. It's just for basic size checking.
* Link at 32MiB address and rely on cbfstool to relocate to XIP. */ * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M) VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
#include "car.ld" INCLUDE "verstage/arch/x86/car.ld"
#elif ENV_BOOTBLOCK #elif ENV_BOOTBLOCK
#include "car.ld" INCLUDE "bootblock/arch/x86/car.ld"
#elif ENV_POSTCAR #elif ENV_POSTCAR
POSTCAR(32M, 1M) POSTCAR(32M, 1M)
@ -38,5 +38,5 @@ SECTIONS
} }
#if ENV_BOOTBLOCK #if ENV_BOOTBLOCK
#include <arch/x86/bootblock.ld> INCLUDE "bootblock/arch/x86/bootblock.ld"
#endif /* ENV_BOOTBLOCK */ #endif /* ENV_BOOTBLOCK */