AGESA: Sync f15tn and f15rl northbridge code
Change-Id: Ia55c82f2245335a5d02e4d6567f606596c8439c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20772 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -2,6 +2,7 @@
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -153,7 +154,7 @@ static void f1_write_config32(unsigned reg, u32 value)
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}
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}
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static u32 amdfam15_nodeid(device_t dev)
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static u32 amdfam15_nodeid(struct device *dev)
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{
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#if MAX_NODE_NUMS == 64
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unsigned busn;
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@ -188,7 +189,7 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn)
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* @retval 0 resource exists, not usable
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* @retval 1 resource exist, resource has been allocated before
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*/
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static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
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static int reg_useable(unsigned reg, struct device *goal_dev, unsigned goal_nodeid,
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unsigned goal_link)
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{
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struct resource *res;
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@ -196,7 +197,7 @@ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
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int result;
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res = 0;
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for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) {
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device_t dev;
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struct device *dev;
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dev = __f0_dev[nodeid];
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if (!dev)
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continue;
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@ -216,7 +217,7 @@ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
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return result;
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}
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static struct resource *amdfam15_find_iopair(device_t dev, unsigned nodeid, unsigned link)
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static struct resource *amdfam15_find_iopair(struct device *dev, unsigned nodeid, unsigned link)
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{
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struct resource *resource;
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u32 free_reg, reg;
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@ -243,7 +244,7 @@ static struct resource *amdfam15_find_iopair(device_t dev, unsigned nodeid, unsi
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return resource;
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}
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static struct resource *amdfam15_find_mempair(device_t dev, u32 nodeid, u32 link)
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static struct resource *amdfam15_find_mempair(struct device *dev, u32 nodeid, u32 link)
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{
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struct resource *resource;
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u32 free_reg, reg;
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@ -269,7 +270,7 @@ static struct resource *amdfam15_find_mempair(device_t dev, u32 nodeid, u32 link
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return resource;
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}
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static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link)
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static void amdfam15_link_read_bases(struct device *dev, u32 nodeid, u32 link)
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{
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struct resource *resource;
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@ -311,7 +312,7 @@ static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link)
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}
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static void nb_read_resources(device_t dev)
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static void nb_read_resources(struct device *dev)
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{
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u32 nodeid;
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struct bus *link;
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@ -331,7 +332,7 @@ static void nb_read_resources(device_t dev)
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mmconf_resource(dev, 0xc0010058);
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}
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static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
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static void set_resource(struct device *dev, struct resource *resource, u32 nodeid)
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{
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resource_t rbase, rend;
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unsigned reg, link_num;
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@ -382,7 +383,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
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* but it is too difficult to deal with the resource allocation magic.
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*/
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static void create_vga_resource(device_t dev, unsigned nodeid)
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static void create_vga_resource(struct device *dev, unsigned nodeid)
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{
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struct bus *link;
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@ -391,12 +392,12 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
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for (link = dev->link_list; link; link = link->next) {
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if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
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#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
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extern device_t vga_pri; // the primary vga device, defined in device.c
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extern struct device *vga_pri; // the primary vga device, defined in device.c
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printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
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link->secondary,link->subordinate);
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/* We need to make sure the vga_pri is under the link */
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if ((vga_pri->bus->secondary >= link->secondary) &&
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(vga_pri->bus->secondary <= link->subordinate))
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(vga_pri->bus->secondary <= link->subordinate))
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#endif
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break;
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}
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@ -410,7 +411,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
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set_vga_enable_reg(nodeid, sblink);
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}
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static void nb_set_resources(device_t dev)
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static void nb_set_resources(struct device *dev)
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{
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unsigned nodeid;
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struct bus *bus;
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@ -433,7 +434,6 @@ static void nb_set_resources(device_t dev)
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}
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}
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static unsigned long acpi_fill_hest(acpi_hest_t *hest)
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{
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void *addr, *current;
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@ -594,7 +594,7 @@ struct chip_operations northbridge_amd_agesa_family15tn_ops = {
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.enable_dev = 0,
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};
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static void domain_read_resources(device_t dev)
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static void domain_read_resources(struct device *dev)
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{
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unsigned reg;
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@ -697,7 +697,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
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}
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#endif
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static void domain_set_resources(device_t dev)
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static void domain_set_resources(struct device *dev)
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{
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unsigned long mmio_basek;
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u32 pci_tolm;
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@ -814,7 +814,7 @@ static void sysconf_init(device_t dev) // first node
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node_nums = ((pci_read_config32(dev, 0x60)>>4) & 7) + 1; //NodeCnt[2:0]
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}
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static void add_more_links(device_t dev, unsigned total_links)
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static void add_more_links(struct device *dev, unsigned total_links)
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{
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struct bus *link, *last = NULL;
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int link_num;
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@ -1026,7 +1026,7 @@ static void cpu_bus_scan(device_t dev)
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}
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}
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static void cpu_bus_init(device_t dev)
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static void cpu_bus_init(struct device *dev)
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{
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initialize_cpus(dev->link_list);
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}
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@ -1057,7 +1057,7 @@ static void root_complex_enable_dev(struct device *dev)
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}
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struct chip_operations northbridge_amd_agesa_family15tn_root_complex_ops = {
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CHIP_NAME("AMD FAM15tn Root Complex")
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CHIP_NAME("AMD Family 15tn Root Complex")
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.enable_dev = root_complex_enable_dev,
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};
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