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static devices 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2003-07-23 18:20:17 +00:00
parent de085393ed
commit 2910a2b545
4 changed files with 18 additions and 10 deletions
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7
src/boot/hardwaremain.c
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@ -35,6 +35,7 @@ it with the version available from LANL.
#include <part/sizeram.h> #include <part/sizeram.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <device/chip.h>
#include <delay.h> #include <delay.h>
#if 0 #if 0
#include <part/mainboard.h> #include <part/mainboard.h>
@ -146,6 +147,9 @@ void hardwaremain(int boot_complete)
unsigned long totalmem; unsigned long totalmem;
post_code(0x80); post_code(0x80);
CONFIGURE(CONF_PASS_PRE_CONSOLE);
/* displayinit MUST PRECEDE ALL PRINTK! */ /* displayinit MUST PRECEDE ALL PRINTK! */
console_init(); console_init();
@ -163,6 +167,7 @@ void hardwaremain(int boot_complete)
} }
#endif #endif
init_timer(); init_timer();
CONFIGURE(CONF_PASS_PRE_PCI);
/* pick how to scan the bus. This is first so we can get at memory size. */ /* pick how to scan the bus. This is first so we can get at memory size. */
printk_info("Finding PCI configuration type.\n"); printk_info("Finding PCI configuration type.\n");
@ -215,6 +220,8 @@ void hardwaremain(int boot_complete)
*/ */
lb_mem = write_tables(mem, processor_map); lb_mem = write_tables(mem, processor_map);
CONFIGURE(CONF_PASS_PRE_PCI);
elfboot(lb_mem); elfboot(lb_mem);
} }

18
src/include/device/chip.h
View File

@ -7,9 +7,9 @@
/* some of the types of resources chips can control */ /* some of the types of resources chips can control */
#ifndef CONFIG_CHIP_CONFIGURE #ifndef CONFIG_CHIP_CONFIGURE
#define CHIP_CONFIGURE(chip, pass) chip_configure(chip, pass) #define CONFIGURE(dev, pass) chip_configure(chip, pass)
#else #else
#define CHIP_CONFIGURE(chip, pass) #define CONFIGURE(dev, pass)
#endif #endif
struct com_ports { struct com_ports {
@ -28,13 +28,13 @@ struct lpt_ports {
}; };
enum chip_pass { enum chip_pass {
CHIP_PASS_PRE_CONSOLE, CONF_PASS_PRE_CONSOLE,
CHIP_PASS_PRE_PCI, CONF_PASS_PRE_PCI,
CHIP_PASS_PRE_DEVICE_ENUMERATE, CONF_PASS_PRE_DEVICE_ENUMERATE,
CHIP_PASS_PRE_DEVICE_CONFIGURE, CONF_PASS_PRE_DEVICE_CONFIGURE,
CHIP_PASS_PRE_DEVICE_ENABLE, CONF_PASS_PRE_DEVICE_ENABLE,
CHIP_PASS_PRE_DEVICE_INITIALIZE, CONF_PASS_PRE_DEVICE_INITIALIZE,
CHIP_PASS_PRE_BOOT CONF_PASS_PRE_BOOT
}; };

1
src/superio/NSC/pc97307/Config.lb
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@ -1 +1,2 @@
config chip.h
object superio.c object superio.c

2
src/superio/NSC/pc97307/superio.c
View File

@ -17,7 +17,7 @@ void sio_enable(struct chip *chip, enum chip_pass pass)
struct superio_NSC_pc97307_config *conf = (struct superio_NSC_pc97307_config *)chip->chip_info; struct superio_NSC_pc97307_config *conf = (struct superio_NSC_pc97307_config *)chip->chip_info;
switch (pass) { switch (pass) {
case CHIP_PRE_CONSOLE: case CONF_PASS_PRE_CONSOLE:
/* Enable Super IO Chip */ /* Enable Super IO Chip */
pnp_output(0x07, 6); /* LD 6 = UART1 */ pnp_output(0x07, 6); /* LD 6 = UART1 */
pnp_output(0x30, 0); /* Dectivate */ pnp_output(0x30, 0); /* Dectivate */