From 291294d137393bb1f4d59b388f287134943f2a95 Mon Sep 17 00:00:00 2001 From: Selma Bensaid Date: Mon, 11 Oct 2021 16:37:36 -0700 Subject: [PATCH] soc/intel/alderlake: fix NULL pointer dereference microcode_file could be NULL and passed to get_microcode_size, this was detected by klocwork scan. Signed-off-by: Selma Bensaid Change-Id: Ibb3d49ab18d8c26bbf5d6bf6bdf1bf91137f5736 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58233 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/alderlake/fsp_params.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 333957f2ea..f9569f9e41 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -346,12 +346,14 @@ static void fill_fsps_cpu_params(FSP_S_CONFIG *s_cfg, /* Locate microcode and pass to FSP-S for 2nd microcode loading */ microcode_file = intel_microcode_find(); - microcode_len = get_microcode_size(microcode_file); - if ((microcode_file != NULL) && (microcode_len != 0)) { - /* Update CPU Microcode patch base address/size */ - s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode_file; - s_cfg->MicrocodeRegionSize = (uint32_t)microcode_len; + if (microcode_file != NULL) { + microcode_len = get_microcode_size(microcode_file); + if (microcode_len != 0) { + /* Update CPU Microcode patch base address/size */ + s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode_file; + s_cfg->MicrocodeRegionSize = (uint32_t)microcode_len; + } } /* Use coreboot MP PPI services if Kconfig is enabled */