From 2927a66dc9cc1703d937535cb835701f4145ca61 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 12 Jul 2021 22:39:10 +0200 Subject: [PATCH] soc/amd/picasso,stoneyridge/mca: factor out mca_check_all_banks Change-Id: I5496fd27f5c56d35ab95a5e02ea313b5b5536668 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/56241 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/mca.c | 33 ++++++++++++++++++--------------- src/soc/amd/stoneyridge/mca.c | 29 ++++++++++++++++------------- 2 files changed, 34 insertions(+), 28 deletions(-) diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c index 7561a5609c..973b3b5277 100644 --- a/src/soc/amd/picasso/mca.c +++ b/src/soc/amd/picasso/mca.c @@ -164,6 +164,23 @@ static void mca_print_error(unsigned int bank) printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo); } +static void mca_check_all_banks(void) +{ + struct mca_bank_status mci; + const unsigned int num_banks = mca_get_bank_count(); + + for (unsigned int i = 0 ; i < num_banks ; i++) { + mci.bank = i; + mci.sts = rdmsr(MCAX_STATUS_MSR(i)); + if (mci.sts.hi || mci.sts.lo) { + mca_print_error(i); + + if (CONFIG(ACPI_BERT) && mca_valid(mci.sts)) + build_bert_mca_error(&mci); + } + } +} + static void mca_clear_errors(void) { const unsigned int num_banks = mca_get_bank_count(); @@ -177,20 +194,6 @@ static void mca_clear_errors(void) /* Check the Machine Check Architecture Extension registers */ void check_mca(void) { - unsigned int i; - struct mca_bank_status mci; - const unsigned int num_banks = mca_get_bank_count(); - - for (i = 0 ; i < num_banks ; i++) { - mci.bank = i; - mci.sts = rdmsr(MCAX_STATUS_MSR(i)); - if (mci.sts.hi || mci.sts.lo) { - mca_print_error(i); - - if (CONFIG(ACPI_BERT) && mca_valid(mci.sts)) - build_bert_mca_error(&mci); - } - } - + mca_check_all_banks(); mca_clear_errors(); } diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c index a64b01dd8e..9ba201ea28 100644 --- a/src/soc/amd/stoneyridge/mca.c +++ b/src/soc/amd/stoneyridge/mca.c @@ -164,24 +164,13 @@ static void mca_print_error(unsigned int bank) printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo); } -static void mca_clear_errors(void) +static void mca_check_all_banks(void) { - const unsigned int num_banks = mca_get_bank_count(); - const msr_t msr = {.lo = 0, .hi = 0}; - - /* Zero all machine check error status registers */ - for (unsigned int i = 0 ; i < num_banks ; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), msr); -} - -void check_mca(void) -{ - unsigned int i; struct mca_bank_status mci; const unsigned int num_banks = mca_get_bank_count(); if (is_warm_reset()) { - for (i = 0 ; i < num_banks ; i++) { + for (unsigned int i = 0 ; i < num_banks ; i++) { if (i == 3) /* Reserved in Family 15h */ continue; @@ -195,6 +184,20 @@ void check_mca(void) } } } +} +static void mca_clear_errors(void) +{ + const unsigned int num_banks = mca_get_bank_count(); + const msr_t msr = {.lo = 0, .hi = 0}; + + /* Zero all machine check error status registers */ + for (unsigned int i = 0 ; i < num_banks ; i++) + wrmsr(IA32_MC0_STATUS + (i * 4), msr); +} + +void check_mca(void) +{ + mca_check_all_banks(); mca_clear_errors(); }