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mb/google/hatch: Use GPIO IRQ for sx9310 device 

This change uses GPIO IRQ instead of IOAPIC for GPP_A0 pad which is
the interrupt line for sx9310. This is required because IRQ# used by
GPP_A0 is allocated for PIRQ which does not allow IRQ# sharing.

Additionally, this change also configures GPP_A6 for GPIO IRQ. GPP_A6
is currently unused in the devicetree.

BUG=b:129794308
TEST=Verified that there are no interrupt storms on GPP_A0.

Change-Id: Ibb510a647391c0d9cb854d23656bb4b1cb7756ab
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Furquan Shaikh 2019-04-10 10:26:12 -07:00
parent aea9871a62
commit 29368167b5
3 changed files with 4 additions and 4 deletions
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4
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -20,14 +20,14 @@
static const struct pad_config gpio_table[] = {
/* A0 : SAR0_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A0, NONE, PLTRST, LEVEL, NONE),
PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL),
/* A1 : ESPI_IO0 */
/* A2 : ESPI_IO1 */
/* A3 : ESPI_IO2 */
/* A4 : ESPI_IO3 */
/* A5 : ESPI_CS# */
/* A6 : SAR1_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A6, NONE, PLTRST, LEVEL, NONE),
PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL),
/* A7 : PP3300_SOC_A */
PAD_NC(GPP_A7, NONE),
/* A8 : EMR_GARAGE_DET */

2
src/mainboard/google/hatch/variants/hatch/overridetree.cb
View File

@ -83,7 +83,7 @@ chip soc/intel/cannonlake
device pci 15.3 on
chip drivers/i2c/sx9310
register "desc" = ""SAR Proximity Sensor""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A0_IRQ)"
register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A0)"
register "speed" = "I2C_SPEED_FAST"
register "uid" = "1"
register "reg_prox_ctrl0" = "0x10"

2
src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
View File

@ -68,7 +68,7 @@ chip soc/intel/cannonlake
device pci 15.3 on
chip drivers/i2c/sx9310
register "desc" = ""SAR Proximity Sensor""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A0_IRQ)"
register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A0)"
register "speed" = "I2C_SPEED_FAST"
register "uid" = "1"
register "reg_prox_ctrl0" = "0x10"