x86/mpspec: order the I/O APICs by the APIC Id
Linux (4.16) assumes that the PIT interrupt is connected to the pin 0 of the IOAPIC[0] and panics otherwise. This might be a Linux bug. The MP Specification 1.4 does seem to mandate sequential ordering for bus entries, but not for the I/O APICs. Change-Id: Ibf823eb5b3a29e4590cba915069cdfe5f780edcd Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/25799 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -524,6 +524,22 @@ void *mptable_finalize(struct mp_config_table *mc)
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return smp_next_mpe_entry(mc);
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}
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static const struct device *find_next_ioapic(unsigned int last_ioapic_id)
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{
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const struct device *dev;
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const struct device *result = NULL;
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unsigned int ioapic_id = MAX_APICS;
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for (dev = all_devices; dev; dev = dev->next) {
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if (dev->path.type == DEVICE_PATH_IOAPIC &&
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dev->path.ioapic.ioapic_id > last_ioapic_id &&
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dev->path.ioapic.ioapic_id <= ioapic_id) {
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result = dev;
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}
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}
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return result;
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}
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unsigned long __weak write_smp_table(unsigned long addr)
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{
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struct drivers_generic_ioapic_config *ioapic_config;
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@ -535,6 +551,7 @@ unsigned long __weak write_smp_table(unsigned long addr)
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void *tmp, *v;
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int isaioapic = -1, have_fixed_entries;
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const struct pci_irq_info *pci_irq_info;
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unsigned int ioapic_id = 0;
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v = smp_write_floating_table(addr, 0);
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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@ -545,17 +562,17 @@ unsigned long __weak write_smp_table(unsigned long addr)
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mptable_write_buses(mc, NULL, &isa_bus);
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for (dev = all_devices; dev; dev = dev->next) {
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if (dev->path.type != DEVICE_PATH_IOAPIC)
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continue;
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while ((dev = find_next_ioapic(ioapic_id))) {
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ioapic_config = dev->chip_info;
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if (!ioapic_config) {
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printk(BIOS_ERR, "%s has no config, ignoring\n",
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dev_path(dev));
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ioapic_id++;
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continue;
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}
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smp_write_ioapic(mc, dev->path.ioapic.ioapic_id,
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ioapic_id = dev->path.ioapic.ioapic_id;
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smp_write_ioapic(mc, ioapic_id,
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ioapic_config->version,
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ioapic_config->base);
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