Align several kconfig options to match newconfig:
HT_CHAIN_UNITID_BASE HT_CHAIN_END_UNITID_BASE SB_HT_CHAIN_ON_BUS0 SB_HT_CHAIN_UNITID_OFFSET_ONLY MAX_CPUS MAX_PHYSICAL_CPUS ROM_SIZE TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 Also hook up asus/p2b-ds Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
480b37f8e9
commit
29647d97c5
87 changed files with 118 additions and 220 deletions
src/mainboard
a-trend
abit/be6-ii_v2_0
advantech/pcm-5820
amd
arima/hdama
artecgroup/dbe61
asi
asus
axus/tc320
azza/pt-6ibd
bcom
biostar/m6tba
broadcom/blast
compaq/deskpro_en_sff_p600
dell/s1850
digitallogic
eaglelion/5bcm
gigabyte
hp
ibm
iei
intel
iwill
kontron
lippert
mitac/6513wu
msi
nec/powermate2000
newisys/khepri
nvidia/l1_2pvv
olpc
pcengines/alix1c
rca/rm4100
roda/rk886ex
soyo/sy-6ba-plus-iii
sunw/ultra40
supermicro
technexion/tim8690
technologic/ts5300
televideo/tc7020
tyan
s1846
s2880
s2881
s2882
s2885
s2891
s2912
s4880
s4882
via
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@ -27,7 +27,6 @@ config BOARD_A_TREND_ATC_6220
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select SUPERIO_WINBOND_W83977TF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_A_TREND_ATC_6240
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select SUPERIO_WINBOND_W83627HF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_ABIT_BE6_II_V2_0
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select SUPERIO_WINBOND_W83977TF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -28,7 +28,6 @@ config BOARD_ADVANTECH_PCM_5820
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -8,7 +8,6 @@ config BOARD_AMD_DB800
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select USE_DCACHE_RAM
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select USE_PRINTK_IN_CAR
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select BOARD_ROMSIZE_KB_256
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@ -15,7 +15,7 @@ config BOARD_AMD_DBM690T
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select BOARD_ROMSIZE_KB_512
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select BOARD_ROMSIZE_KB_1024
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config MAINBOARD_DIR
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string
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@ -7,7 +7,6 @@ config BOARD_AMD_NORWICH
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select USE_DCACHE_RAM
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select USE_PRINTK_IN_CAR
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select BOARD_ROMSIZE_KB_256
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@ -14,7 +14,7 @@ config BOARD_AMD_PISTACHIO
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select WAIT_BEFORE_CPUS_INIT
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_512
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select BOARD_ROMSIZE_KB_1024
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config MAINBOARD_DIR
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string
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@ -78,17 +78,17 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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default 1
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depends on BOARD_AMD_PISTACHIO
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x6
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default 0x1
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depends on BOARD_AMD_PISTACHIO
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config HT_CHAIN_UNITID_BASE
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hex
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default 0xa
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default 0x0
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depends on BOARD_AMD_PISTACHIO
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config USE_INIT
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@ -25,7 +25,6 @@ config BOARD_AMD_RUMBA
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select NORTHBRIDGE_AMD_GX2
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select SOUTHBRIDGE_AMD_CS5536
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select HAVE_PIRQ_TABLE
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select BOARD_ROMSIZE_KB_256
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@ -72,7 +72,7 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
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config SB_HT_CHAIN_ON_BUS0
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int
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default 1
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default 0
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depends on BOARD_ARIMA_HDAMA
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config HT_CHAIN_END_UNITID_BASE
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@ -7,7 +7,6 @@ config BOARD_ARTECGROUP_DBE61
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select USE_DCACHE_RAM
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select USE_PRINTK_IN_CAR
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select BOARD_ROMSIZE_KB_256
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@ -28,7 +28,6 @@ config BOARD_ASI_MB_5BLGP
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -28,7 +28,6 @@ config BOARD_ASI_MB_5BLMP
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -26,6 +26,7 @@ source "src/mainboard/asus/a8n_e/Kconfig"
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source "src/mainboard/asus/a8v-e_se/Kconfig"
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source "src/mainboard/asus/p2b/Kconfig"
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source "src/mainboard/asus/p2b-d/Kconfig"
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source "src/mainboard/asus/p2b-ds/Kconfig"
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source "src/mainboard/asus/p2b-f/Kconfig"
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source "src/mainboard/asus/p3b-f/Kconfig"
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source "src/mainboard/asus/m2v-mx_se/Kconfig"
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@ -80,7 +80,7 @@ config MAX_PHYSICAL_CPUS
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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default 0x20
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depends on BOARD_ASUS_A8N_E
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config HT_CHAIN_UNITID_BASE
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@ -27,7 +27,6 @@ config BOARD_ASUS_MEW_AM
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select SUPERIO_SMSC_SMSCSUPERIO
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_ASUS_MEW_VM
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select SUPERIO_SMSC_LPC47B272
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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@ -29,7 +29,6 @@ config BOARD_ASUS_P2B_D
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select HAVE_MP_TABLE
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select SMP
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -29,7 +29,6 @@ config BOARD_ASUS_P2B_DS
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select HAVE_MP_TABLE
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select SMP
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_ASUS_P2B_F
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select SUPERIO_WINBOND_W83977TF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_ASUS_P2B
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select SUPERIO_WINBOND_W83977TF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_ASUS_P3B_F
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select SUPERIO_WINBOND_W83977TF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -28,7 +28,6 @@ config BOARD_AXUS_TC320
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_AZZA_PT_6IBD
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select SUPERIO_WINBOND_W83977TF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -28,7 +28,6 @@ config BOARD_BCOM_WINNET100
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -7,7 +7,6 @@ config BOARD_BCOM_WINNETP680
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select SUPERIO_WINBOND_W83697HF
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_BIOSTAR_M6TBA
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select SUPERIO_SMSC_SMSCSUPERIO
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -13,6 +13,7 @@ config BOARD_BROADCOM_BLAST
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select BOARD_ROMSIZE_KB_512
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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config MAINBOARD_DIR
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string
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@ -41,12 +42,7 @@ config APIC_ID_OFFSET
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_BROADCOM_BLAST
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config SB_HT_CHAIN_UNITID_OFFSET_ONLY
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bool
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default n
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default 1
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depends on BOARD_BROADCOM_BLAST
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config LB_CKS_RANGE_END
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@ -81,12 +77,12 @@ config MAX_PHYSICAL_CPUS
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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default 0x1
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depends on BOARD_BROADCOM_BLAST
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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default 0x6
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depends on BOARD_BROADCOM_BLAST
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config USE_INIT
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@ -28,7 +28,6 @@ config BOARD_COMPAQ_DESKPRO_EN_SFF_P600
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select SUPERIO_NSC_PC97317
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -44,12 +44,12 @@ config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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config MAX_CPUS
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int
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default 2
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default 4
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depends on BOARD_DELL_S1850
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config MAX_PHYSICAL_CPUS
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int
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default 2
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default 1
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depends on BOARD_DELL_S1850
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config USE_INIT
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@ -3,7 +3,7 @@ config BOARD_DIGITALLOGIC_MSM586SEG
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select ARCH_X86
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select CPU_AMD_SC520
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select HAVE_PIRQ_TABLE
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select BOARD_ROMSIZE_KB_256
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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string
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@ -8,7 +8,6 @@ config BOARD_DIGITALLOGIC_MSM800SEV
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select USE_DCACHE_RAM
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select USE_PRINTK_IN_CAR
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select BOARD_ROMSIZE_KB_256
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@ -28,7 +28,6 @@ config BOARD_EAGLELION_5BCM
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -27,7 +27,6 @@ config BOARD_GIGABYTE_GA_6BXC
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select SUPERIO_ITE_IT8671F
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select HAVE_PIRQ_TABLE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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@ -11,7 +11,6 @@ config BOARD_GIGABYTE_GA_2761GXDK
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select LIFT_BSP_APIC_ID
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select K8_REV_F_SUPPORT
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select BOARD_ROMSIZE_KB_512
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@ -112,7 +111,7 @@ config HT_CHAIN_UNITID_BASE
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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default 0x20
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depends on BOARD_GIGABYTE_GA_2761GXDK
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config USE_INIT
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@ -13,7 +13,6 @@ config BOARD_GIGABYTE_M57SLI
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select LIFT_BSP_APIC_ID
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select HAVE_ACPI_TABLES
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select K8_REV_F_SUPPORT
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select BOARD_ROMSIZE_KB_512
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@ -115,7 +114,7 @@ config HT_CHAIN_UNITID_BASE
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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default 0x20
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depends on BOARD_GIGABYTE_M57SLI
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config USE_INIT
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@ -14,6 +14,7 @@ config BOARD_HP_DL145_G3
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select HAVE_HARD_RESET
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select LIFT_BSP_APIC_ID
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select BOARD_ROMSIZE_KB_512
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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|
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config MAINBOARD_DIR
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string
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@ -82,12 +83,12 @@ config MAX_PHYSICAL_CPUS
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|
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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default 0x1
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depends on BOARD_HP_DL145_G3
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|
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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default 0x6
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depends on BOARD_HP_DL145_G3
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config USE_INIT
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@ -30,7 +30,6 @@ config BOARD_HP_E_VECTRA_P2706T
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select SUPERIO_NSC_PC87360
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select HAVE_PIRQ_TABLE
|
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select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
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select BOARD_ROMSIZE_KB_512
|
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|
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config MAINBOARD_DIR
|
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|
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@ -78,17 +78,17 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
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config SB_HT_CHAIN_ON_BUS0
|
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int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_IBM_E325
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x20
|
||||
depends on BOARD_IBM_E325
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x1
|
||||
depends on BOARD_IBM_E325
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -78,17 +78,17 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_IBM_E326
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x20
|
||||
depends on BOARD_IBM_E326
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x1
|
||||
depends on BOARD_IBM_E326
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -28,7 +28,6 @@ config BOARD_IEI_JUKI_511P
|
|||
select PIRQ_ROUTE
|
||||
select HAVE_OPTION_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -29,7 +29,6 @@ config BOARD_IEI_NOVA_4899R
|
|||
select PIRQ_ROUTE
|
||||
select HAVE_OPTION_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -8,7 +8,6 @@ config BOARD_IEI_PCISA_LX_800_R10
|
|||
select HAVE_PIRQ_TABLE
|
||||
select PIRQ_ROUTE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select USE_DCACHE_RAM
|
||||
select USE_PRINTK_IN_CAR
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
|
|
@ -34,7 +34,7 @@ config BOARD_INTEL_D945GCLF
|
|||
select UDELAY_LAPIC
|
||||
select HAVE_ACPI_TABLES
|
||||
select HAVE_SMI_HANDLER
|
||||
select BOARD_ROMSIZE_KB_1024
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -81,6 +81,11 @@ config IRQ_SLOT_COUNT
|
|||
default 18
|
||||
depends on BOARD_INTEL_D945GCLF
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_INTEL_D945GCLF
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
|
|
|
@ -11,7 +11,6 @@ config BOARD_INTEL_EAGLEHEIGHTS
|
|||
select MMCONF_SUPPORT
|
||||
select USE_PRINTK_IN_CAR
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select AP_IN_SIPI_WAIT
|
||||
select HAVE_ACPI_TABLES
|
||||
select BOARD_ROMSIZE_KB_1024
|
||||
|
@ -61,6 +60,11 @@ config IRQ_SLOT_COUNT
|
|||
default 18
|
||||
depends on BOARD_INTEL_EAGLEHEIGHTS
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_INTEL_EAGLEHEIGHTS
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
|
|
|
@ -49,3 +49,8 @@ config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|||
hex
|
||||
default 0x2680
|
||||
depends on BOARD_INTEL_MTARVON
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_INTEL_MTARVON
|
||||
|
|
|
@ -51,3 +51,7 @@ config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|||
default 0x2680
|
||||
depends on BOARD_INTEL_TRUXTON
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_INTEL_TRUXTON
|
||||
|
|
|
@ -64,7 +64,7 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
default 2
|
||||
depends on BOARD_IWILL_DK8S2
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
|
@ -79,17 +79,17 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_IWILL_DK8S2
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x20
|
||||
depends on BOARD_IWILL_DK8S2
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x1
|
||||
depends on BOARD_IWILL_DK8S2
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -63,7 +63,7 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
default 2
|
||||
depends on BOARD_IWILL_DK8X
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
|
@ -78,17 +78,17 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_IWILL_DK8X
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x20
|
||||
depends on BOARD_IWILL_DK8X
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x1
|
||||
depends on BOARD_IWILL_DK8X
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -62,6 +62,11 @@ config IRQ_SLOT_COUNT
|
|||
default 18
|
||||
depends on BOARD_KONTRON_986LCD_M
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_KONTRON_986LCD_M
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
|
|
|
@ -15,7 +15,7 @@ config BOARD_KONTRON_KT690
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select HAVE_ACPI_TABLES
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select BOARD_ROMSIZE_KB_1024
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -5,7 +5,6 @@ config BOARD_LIPPERT_FRONTRUNNER
|
|||
select NORTHBRIDGE_AMD_GX2
|
||||
select SOUTHBRIDGE_AMD_CS5535
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select HAVE_PIRQ_TABLE
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@ config BOARD_LIPPERT_ROADRUNNER_LX
|
|||
select HAVE_PIRQ_TABLE
|
||||
select PIRQ_ROUTE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select USE_DCACHE_RAM
|
||||
select USE_PRINTK_IN_CAR
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
|
|
@ -8,7 +8,6 @@ config BOARD_LIPPERT_SPACERUNNER_LX
|
|||
select HAVE_PIRQ_TABLE
|
||||
select PIRQ_ROUTE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select USE_DCACHE_RAM
|
||||
select USE_PRINTK_IN_CAR
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
|
|
@ -27,7 +27,6 @@ config BOARD_MITAC_6513WU
|
|||
select SUPERIO_SMSC_SMSCSUPERIO
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -27,7 +27,6 @@ config BOARD_MSI_MS_6119
|
|||
select SUPERIO_WINBOND_W83977TF
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -27,7 +27,6 @@ config BOARD_MSI_MS_6147
|
|||
select SUPERIO_WINBOND_W83977TF
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -27,7 +27,6 @@ config BOARD_MSI_MS_6156
|
|||
select SUPERIO_WINBOND_W83977TF
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -12,7 +12,6 @@ config BOARD_MSI_MS7260
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select LIFT_BSP_APIC_ID
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
select K8_REV_F_SUPPORT
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
|
@ -113,7 +112,7 @@ config HT_CHAIN_UNITID_BASE
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_MSI_MS7260
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -14,6 +14,7 @@ config BOARD_MSI_MS9185
|
|||
select HAVE_HARD_RESET
|
||||
select LIFT_BSP_APIC_ID
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -45,11 +46,6 @@ config SB_HT_CHAIN_ON_BUS0
|
|||
default 2
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
int
|
||||
default 122
|
||||
|
@ -82,12 +78,12 @@ config MAX_PHYSICAL_CPUS
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x1
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x6
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config USE_INIT
|
||||
|
@ -95,11 +91,6 @@ config USE_INIT
|
|||
default n
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9185
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
|
|
|
@ -11,7 +11,6 @@ config BOARD_MSI_MS9282
|
|||
select USE_PRINTK_IN_CAR
|
||||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
select K8_REV_F_SUPPORT
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
|
@ -42,7 +41,7 @@ config APIC_ID_OFFSET
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 1
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config LB_CKS_RANGE_START
|
||||
|
@ -87,12 +86,12 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 2
|
||||
default 4
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 1
|
||||
default 2
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config HW_MEM_HOLE_SIZE_AUTO_INC
|
||||
|
@ -107,7 +106,7 @@ config HT_CHAIN_UNITID_BASE
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_MSI_MS9282
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -27,7 +27,6 @@ config BOARD_NEC_POWERMATE_2000
|
|||
select SUPERIO_SMSC_SMSCSUPERIO
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -13,6 +13,7 @@ config BOARD_NEWISYS_KHEPRI
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -41,12 +42,7 @@ config K8_REV_F_SUPPORT
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
default 0
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
|
@ -81,12 +77,12 @@ config MAX_PHYSICAL_CPUS
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x1
|
||||
depends on BOARD_NEWISYS_KHEPRI
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -12,7 +12,6 @@ config BOARD_NVIDIA_L1_2PVV
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select LIFT_BSP_APIC_ID
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
select K8_REV_F_SUPPORT
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
|
@ -93,12 +92,12 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 2
|
||||
default 4
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 1
|
||||
default 2
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config HW_MEM_HOLE_SIZE_AUTO_INC
|
||||
|
@ -113,7 +112,7 @@ config HT_CHAIN_UNITID_BASE
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_NVIDIA_L1_2PVV
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -5,7 +5,6 @@ config BOARD_OLPC_BTEST
|
|||
select NORTHBRIDGE_AMD_GX2
|
||||
select SOUTHBRIDGE_AMD_CS5536
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select HAVE_PIRQ_TABLE
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
|
|
|
@ -5,7 +5,6 @@ config BOARD_OLPC_REV_A
|
|||
select NORTHBRIDGE_AMD_GX2
|
||||
select SOUTHBRIDGE_AMD_CS5536
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select HAVE_PIRQ_TABLE
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@ config BOARD_PCENGINES_ALIX1C
|
|||
select HAVE_PIRQ_TABLE
|
||||
select PIRQ_ROUTE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select USE_DCACHE_RAM
|
||||
select USE_PRINTK_IN_CAR
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
|
|
@ -7,7 +7,6 @@ config BOARD_RCA_RM4100
|
|||
select SUPERIO_SMSC_SMSCSUPERIO
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -58,6 +58,11 @@ config IRQ_SLOT_COUNT
|
|||
default 18
|
||||
depends on BOARD_RODA_RK886EX
|
||||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
depends on BOARD_RODA_RK886EX
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
|
|
|
@ -27,7 +27,6 @@ config BOARD_SOYO_SY_6BA_PLUS_III
|
|||
select SUPERIO_ITE_IT8671F
|
||||
select HAVE_PIRQ_TABLE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -80,7 +80,7 @@ config MAX_PHYSICAL_CPUS
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_SUNW_ULTRA40
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
|
|
|
@ -87,7 +87,7 @@ config MAX_PHYSICAL_CPUS
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_SUPERMICRO_H8DME
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
|
|
|
@ -12,7 +12,7 @@ config BOARD_SUPERMICRO_H8DMR
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select LIFT_BSP_APIC_ID
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select BOARD_ROMSIZE_KB_1024
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -86,7 +86,7 @@ config MAX_PHYSICAL_CPUS
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_SUPERMICRO_H8DMR
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
|
|
|
@ -79,17 +79,17 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 1
|
||||
depends on BOARD_TECHNEXION_TIM8690
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x1
|
||||
depends on BOARD_TECHNEXION_TIM8690
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x0
|
||||
depends on BOARD_TECHNEXION_TIM8690
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -3,7 +3,7 @@ config BOARD_TECHNOLOGIC_TS5300
|
|||
select ARCH_X86
|
||||
select CPU_AMD_SC520
|
||||
select HAVE_PIRQ_TABLE
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
select BOARD_ROMSIZE_KB_128
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
|
|
@ -28,7 +28,6 @@ config BOARD_TELEVIDEO_TC7020
|
|||
select HAVE_PIRQ_TABLE
|
||||
select PIRQ_ROUTE
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -26,7 +26,6 @@ config BOARD_TYAN_S1846
|
|||
select SOUTHBRIDGE_INTEL_I82371EB
|
||||
select SUPERIO_NSC_PC87309
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_256
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -10,6 +10,7 @@ config BOARD_TYAN_S2880
|
|||
select HAVE_PIRQ_TABLE
|
||||
select HAVE_MP_TABLE
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -23,7 +24,7 @@ config APIC_ID_OFFSET
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
|
@ -53,7 +54,7 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
default 2
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
|
@ -68,12 +69,12 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x1
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x20
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config USE_INIT
|
||||
|
@ -86,16 +87,6 @@ config WAIT_BEFORE_CPUS_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_TYAN_S2880
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 9
|
||||
|
|
|
@ -10,6 +10,7 @@ config BOARD_TYAN_S2881
|
|||
select HAVE_PIRQ_TABLE
|
||||
select HAVE_MP_TABLE
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -23,7 +24,7 @@ config APIC_ID_OFFSET
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2881
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
|
@ -86,16 +87,6 @@ config WAIT_BEFORE_CPUS_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S2881
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2881
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_TYAN_S2881
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 9
|
||||
|
|
|
@ -10,6 +10,7 @@ config BOARD_TYAN_S2882
|
|||
select HAVE_PIRQ_TABLE
|
||||
select HAVE_MP_TABLE
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -23,7 +24,7 @@ config APIC_ID_OFFSET
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2882
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
|
@ -68,12 +69,12 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
|
|||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0xa
|
||||
default 0x1
|
||||
depends on BOARD_TYAN_S2882
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x6
|
||||
default 0x20
|
||||
depends on BOARD_TYAN_S2882
|
||||
|
||||
config USE_INIT
|
||||
|
@ -86,16 +87,6 @@ config WAIT_BEFORE_CPUS_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S2882
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2882
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_TYAN_S2882
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 9
|
||||
|
|
|
@ -10,6 +10,7 @@ config BOARD_TYAN_S2885
|
|||
select HAVE_PIRQ_TABLE
|
||||
select HAVE_MP_TABLE
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -86,16 +87,6 @@ config WAIT_BEFORE_CPUS_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S2885
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 0
|
||||
depends on BOARD_TYAN_S2885
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_TYAN_S2885
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 9
|
||||
|
|
|
@ -11,7 +11,8 @@ config BOARD_TYAN_S2891
|
|||
select HAVE_MP_TABLE
|
||||
select SERIAL_CPU_INIT
|
||||
select HAVE_ACPI_TABLES
|
||||
select BOARD_ROMSIZE_KB_1024
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -88,16 +89,6 @@ config WAIT_BEFORE_CPUS_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S2891
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_TYAN_S2891
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
depends on BOARD_TYAN_S2891
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
|
|
|
@ -12,7 +12,6 @@ config BOARD_TYAN_S2912
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select LIFT_BSP_APIC_ID
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
select K8_REV_F_SUPPORT
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
|
@ -93,12 +92,12 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 2
|
||||
default 4
|
||||
depends on BOARD_TYAN_S2912
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 1
|
||||
default 2
|
||||
depends on BOARD_TYAN_S2912
|
||||
|
||||
config HW_MEM_HOLE_SIZE_AUTO_INC
|
||||
|
@ -113,7 +112,7 @@ config HT_CHAIN_UNITID_BASE
|
|||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_TYAN_S2912
|
||||
|
||||
config USE_INIT
|
||||
|
|
|
@ -13,6 +13,7 @@ config BOARD_TYAN_S4880
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -41,12 +42,7 @@ config K8_REV_F_SUPPORT
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
default 0
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
|
@ -71,22 +67,22 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
default 8
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
default 4
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x1
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config USE_INIT
|
||||
|
@ -94,11 +90,6 @@ config USE_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_TYAN_S4880
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
|
|
|
@ -13,6 +13,7 @@ config BOARD_TYAN_S4882
|
|||
select USE_DCACHE_RAM
|
||||
select HAVE_HARD_RESET
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
@ -41,12 +42,7 @@ config K8_REV_F_SUPPORT
|
|||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||
bool
|
||||
default n
|
||||
default 0
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config LB_CKS_RANGE_END
|
||||
|
@ -71,22 +67,22 @@ config HW_MEM_HOLE_SIZEK
|
|||
|
||||
config MAX_CPUS
|
||||
int
|
||||
default 4
|
||||
default 8
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config MAX_PHYSICAL_CPUS
|
||||
int
|
||||
default 2
|
||||
default 4
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config HT_CHAIN_END_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x20
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config HT_CHAIN_UNITID_BASE
|
||||
hex
|
||||
default 0x0
|
||||
default 0x1
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config USE_INIT
|
||||
|
@ -94,11 +90,6 @@ config USE_INIT
|
|||
default n
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config SB_HT_CHAIN_ON_BUS0
|
||||
int
|
||||
default 2
|
||||
depends on BOARD_TYAN_S4882
|
||||
|
||||
config IRQ_SLOT_COUNT
|
||||
int
|
||||
default 11
|
||||
|
|
|
@ -9,7 +9,6 @@ config BOARD_VIA_PC2500E
|
|||
select HAVE_MP_TABLE
|
||||
select SMP
|
||||
select UDELAY_TSC
|
||||
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -10,7 +10,7 @@ config BOARD_VIA_VT8454C
|
|||
# select MMCONF_SUPPORT
|
||||
select USE_PRINTK_IN_CAR
|
||||
select HAVE_ACPI_TABLES
|
||||
select BOARD_ROMSIZE_KB_1024
|
||||
select BOARD_ROMSIZE_KB_512
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
|
Loading…
Reference in a new issue