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soc/broadwell: remove unused function init_one_gpio() 

Function was copied as part of upstreaming from Chromium tree,
but isn't used and has never been used best I can tell.

Change-Id: I53b8702c97d7a694450aa05ba49da6c26c30f725
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2020-03-15 16:12:58 -05:00 committed by Patrick Georgi
parent 2d977b2dcb
commit 2974ec2cbf
2 changed files with 0 additions and 49 deletions
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48
src/soc/intel/broadwell/gpio.c
View File

@ -49,54 +49,6 @@ static int gpio_to_pirq(int gpio)
}; };
} }
void init_one_gpio(int gpio_num, struct gpio_config *config)
{
u32 owner, route, irqen, reset;
int set, bit;
if (gpio_num > MAX_GPIO_NUMBER || !config)
return;
outl(config->conf0, GPIO_BASE_ADDRESS + GPIO_CONFIG0(gpio_num));
outl(config->conf1, GPIO_BASE_ADDRESS + GPIO_CONFIG1(gpio_num));
/* Determine set and bit based on GPIO number */
set = gpio_num >> 5;
bit = gpio_num % 32;
/* Save settings from current GPIO config */
owner = inl(GPIO_BASE_ADDRESS + GPIO_OWNER(set));
route = inl(GPIO_BASE_ADDRESS + GPIO_ROUTE(set));
irqen = inl(GPIO_BASE_ADDRESS + GPIO_IRQ_IE(set));
reset = inl(GPIO_BASE_ADDRESS + GPIO_RESET(set));
owner |= config->owner << bit;
route |= config->route << bit;
irqen |= config->irqen << bit;
reset |= config->reset << bit;
outl(owner, GPIO_BASE_ADDRESS + GPIO_OWNER(set));
outl(route, GPIO_BASE_ADDRESS + GPIO_ROUTE(set));
outl(irqen, GPIO_BASE_ADDRESS + GPIO_IRQ_IE(set));
outl(reset, GPIO_BASE_ADDRESS + GPIO_RESET(set));
if (set == 0) {
u32 blink = inl(GPIO_BASE_ADDRESS + GPIO_BLINK);
blink |= config->blink << bit;
outl(blink, GPIO_BASE_ADDRESS + GPIO_BLINK);
}
/* PIRQ to IO-APIC map */
if (config->pirq == GPIO_PIRQ_APIC_ROUTE) {
u32 pirq2apic = inl(GPIO_BASE_ADDRESS + GPIO_PIRQ_APIC_EN);
set = gpio_to_pirq(gpio_num);
if (set >= 0) {
pirq2apic |= 1 << set;
outl(pirq2apic, GPIO_BASE_ADDRESS + GPIO_PIRQ_APIC_EN);
}
}
}
void init_gpios(const struct gpio_config config[]) void init_gpios(const struct gpio_config config[])
{ {
const struct gpio_config *entry; const struct gpio_config *entry;

1
src/soc/intel/broadwell/include/soc/gpio.h
View File

@ -175,7 +175,6 @@ struct gpio_config {
} __packed; } __packed;
/* Configure GPIOs with mainboard provided settings */ /* Configure GPIOs with mainboard provided settings */
void init_one_gpio(int gpio_num, struct gpio_config *config);
void init_gpios(const struct gpio_config config[]); void init_gpios(const struct gpio_config config[]);
/* Get GPIO pin value */ /* Get GPIO pin value */