soc/mediatek: Move common DEVPAC enums and functions to common

Some enums and functions are the same in DEVAPC driver for MT8195,
MT8186, and MT8188, so we move them to common folder.

TEST=build pass.
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia7d2145780780fd54b76952db96424b8ea477594
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Bo-Chen Chen 2022-08-29 19:05:06 +08:00 committed by Martin Roth
parent 40adaf6e7c
commit 297b634062
8 changed files with 74 additions and 118 deletions

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@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <console/console.h>
#include <soc/devapc.h>
#include <soc/devapc_common.h>
void *getreg_domain(uintptr_t base, unsigned int offset,
enum domain_id domain_id, unsigned int index)
{
return (void *)(base + offset + domain_id * DOMAIN_OFT + index * IDX_OFT);
}
void *getreg(uintptr_t base, unsigned int offset)
{
return getreg_domain(base, offset, 0, 0);
}
void set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id,
enum devapc_perm_type perm)
{
uint32_t apc_register_index;
uint32_t apc_set_index;
apc_register_index = module / MOD_NO_IN_1_DEVAPC;
apc_set_index = module % MOD_NO_IN_1_DEVAPC;
clrsetbits32(getreg_domain(base, 0, domain_id, apc_register_index),
0x3 << (apc_set_index * 2),
perm << (apc_set_index * 2));
}

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@ -47,4 +47,42 @@
#define NO_PROTECTION3 NO_PROTECTION2, NO_PROTECTION
#define NO_PROTECTION4 NO_PROTECTION3, NO_PROTECTION
enum trans_type {
NON_SECURE_TRANS = 0,
SECURE_TRANS,
};
enum devapc_perm_type {
NO_PROTECTION = 0,
SEC_RW_ONLY,
SEC_RW_NS_R,
FORBIDDEN,
PERM_NUM,
};
enum domain_id {
DOMAIN_0 = 0,
DOMAIN_1,
DOMAIN_2,
DOMAIN_3,
DOMAIN_4,
DOMAIN_5,
DOMAIN_6,
DOMAIN_7,
DOMAIN_8,
DOMAIN_9,
DOMAIN_10,
DOMAIN_11,
DOMAIN_12,
DOMAIN_13,
DOMAIN_14,
DOMAIN_15,
};
void *getreg_domain(uintptr_t base, unsigned int offset,
enum domain_id domain_id, unsigned int index);
void *getreg(uintptr_t base, unsigned int offset);
void set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id,
enum devapc_perm_type perm);
#endif

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@ -28,7 +28,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
ramstage-y += ../common/auxadc.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += devapc.c
ramstage-y += ../common/devapc.c devapc.c
ramstage-y += ../common/dfd.c
ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c
ramstage-y += ../common/emi.c

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@ -1196,31 +1196,6 @@ static const enum domain_id domain_map[] = {
DOMAIN_12, DOMAIN_13, DOMAIN_14, DOMAIN_15,
};
static inline void *getreg_domain(uintptr_t base, unsigned int offset,
enum domain_id domain_id, unsigned int index)
{
return (void *)(base + offset + domain_id * 0x100 + index * 0x4);
}
static inline void *getreg(uintptr_t base, unsigned int offset)
{
return getreg_domain(base, offset, 0, 0);
}
static void set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id,
enum devapc_perm_type perm)
{
uint32_t apc_register_index;
uint32_t apc_set_index;
apc_register_index = module / MOD_NO_IN_1_DEVAPC;
apc_set_index = module % MOD_NO_IN_1_DEVAPC;
clrsetbits32(getreg_domain(base, 0, domain_id, apc_register_index),
0x3 << (apc_set_index * 2),
perm << (apc_set_index * 2));
}
static void set_infra_ao_apc(uintptr_t base)
{
int i, j;

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@ -22,39 +22,6 @@ enum devapc_ao_offset {
/******************************************************************************
* STRUCTURE DEFINITION
******************************************************************************/
/* Common */
enum trans_type {
NON_SECURE_TRANS = 0,
SECURE_TRANS,
};
enum devapc_perm_type {
NO_PROTECTION = 0,
SEC_RW_ONLY,
SEC_RW_NS_R,
FORBIDDEN,
PERM_NUM,
};
enum domain_id {
DOMAIN_0 = 0,
DOMAIN_1,
DOMAIN_2,
DOMAIN_3,
DOMAIN_4,
DOMAIN_5,
DOMAIN_6,
DOMAIN_7,
DOMAIN_8,
DOMAIN_9,
DOMAIN_10,
DOMAIN_11,
DOMAIN_12,
DOMAIN_13,
DOMAIN_14,
DOMAIN_15,
};
struct apc_infra_peri_dom_16 {
unsigned char d_permission[16];
};
@ -84,6 +51,8 @@ enum devapc_cfg_index {
* Variable DEFINITION
******************************************************************************/
#define MOD_NO_IN_1_DEVAPC 16
#define DOMAIN_OFT 0x100
#define IDX_OFT 0x4
/******************************************************************************
* Bit Field DEFINITION

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@ -41,7 +41,7 @@ ramstage-y += apusys_devapc.c
ramstage-y += ../common/auxadc.c
ramstage-y += ../common/early_init.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += devapc.c
ramstage-y += ../common/devapc.c devapc.c
ramstage-y += ../common/dfd.c
ramstage-y += ../common/dpm.c
ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c

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@ -1643,31 +1643,6 @@ static const enum domain_id domain_map[] = {
DOMAIN_8, DOMAIN_9, DOMAIN_10, DOMAIN_11, DOMAIN_12, DOMAIN_13, DOMAIN_14, DOMAIN_15,
};
static inline void *getreg_domain(uintptr_t base, unsigned int offset,
enum domain_id domain_id, unsigned int index)
{
return (void *)(base + offset + domain_id * 0x40 + index * 0x4);
}
static inline void *getreg(uintptr_t base, unsigned int offset)
{
return getreg_domain(base, offset, 0, 0);
}
static void set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id,
enum devapc_perm_type perm)
{
uint32_t apc_register_index;
uint32_t apc_set_index;
apc_register_index = module / MOD_NO_IN_1_DEVAPC;
apc_set_index = module % MOD_NO_IN_1_DEVAPC;
clrsetbits32(getreg_domain(base, 0, domain_id, apc_register_index),
0x3 << (apc_set_index * 2),
perm << (apc_set_index * 2));
}
static void set_infra_ao_apc(uintptr_t base)
{
int i, j;

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@ -31,39 +31,6 @@ enum scp_offset {
/******************************************************************************
* STRUCTURE DEFINITION
******************************************************************************/
/* Common */
enum trans_type {
NON_SECURE_TRANS = 0,
SECURE_TRANS,
};
enum devapc_perm_type {
NO_PROTECTION = 0,
SEC_RW_ONLY,
SEC_RW_NS_R,
FORBIDDEN,
PERM_NUM,
};
enum domain_id {
DOMAIN_0 = 0,
DOMAIN_1,
DOMAIN_2,
DOMAIN_3,
DOMAIN_4,
DOMAIN_5,
DOMAIN_6,
DOMAIN_7,
DOMAIN_8,
DOMAIN_9,
DOMAIN_10,
DOMAIN_11,
DOMAIN_12,
DOMAIN_13,
DOMAIN_14,
DOMAIN_15,
};
struct apc_infra_peri_dom_16 {
unsigned char d_permission[16];
};
@ -103,6 +70,8 @@ enum devapc_cfg_index {
* Variable DEFINITION
******************************************************************************/
#define MOD_NO_IN_1_DEVAPC 16
#define DOMAIN_OFT 0x40
#define IDX_OFT 0x4
/******************************************************************************
* Bit Field DEFINITION