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include/cpu/x86: Add STM Support 

Addtions to include/cpu/x86 include for STM support.

Change-Id: I2b8e68b2928aefc7996b6a9560c52f71c7c0e1d0
Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33985
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: ron minnich <rminnich@gmail.com>
This commit is contained in:
Eugene D. Myers 2019-07-02 14:06:46 -04:00 committed by ron minnich
parent 7a1b60b694
commit 297b6b862a
2 changed files with 9 additions and 0 deletions
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6
src/include/cpu/x86/msr.h
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@ -30,6 +30,10 @@
#define IA32_BIOS_SIGN_ID 0x8b #define IA32_BIOS_SIGN_ID 0x8b
#define IA32_MPERF 0xe7 #define IA32_MPERF 0xe7
#define IA32_APERF 0xe8 #define IA32_APERF 0xe8
/* STM */
#define IA32_SMM_MONITOR_CTL_MSR 0x9B
#define SMBASE_RO_MSR 0x98
#define IA32_SMM_MONITOR_VALID (1<<0)
#define IA32_MCG_CAP 0x179 #define IA32_MCG_CAP 0x179
#define MCG_CTL_P (1 << 3) #define MCG_CTL_P (1 << 3)
#define MCA_BANKS_MASK 0xff #define MCA_BANKS_MASK 0xff
@ -48,6 +52,8 @@
#define IA32_PAT 0x277 #define IA32_PAT 0x277
#define IA32_MC0_CTL 0x400 #define IA32_MC0_CTL 0x400
#define IA32_MC0_STATUS 0x401 #define IA32_MC0_STATUS 0x401
#define IA32_VMX_BASIC_MSR 0x480
#define IA32_VMX_MISC_MSR 0x485
#define MCA_STATUS_HI_VAL (1UL << (63 - 32)) #define MCA_STATUS_HI_VAL (1UL << (63 - 32))
#define MCA_STATUS_HI_OVERFLOW (1UL << (62 - 32)) #define MCA_STATUS_HI_OVERFLOW (1UL << (62 - 32))
#define MCA_STATUS_HI_UC (1UL << (61 - 32)) #define MCA_STATUS_HI_UC (1UL << (61 - 32))

3
src/include/cpu/x86/smm.h
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@ -64,6 +64,9 @@ extern unsigned char _binary_smm_end[];
struct smm_runtime { struct smm_runtime {
u32 smbase; u32 smbase;
u32 save_state_size; u32 save_state_size;
u32 num_cpus;
/* STM's 32bit entry into SMI handler */
u32 start32_offset;
/* The apic_id_to_cpu provides a mapping from APIC id to CPU number. /* The apic_id_to_cpu provides a mapping from APIC id to CPU number.
* The CPU number is indicated by the index into the array by matching * The CPU number is indicated by the index into the array by matching
* the default APIC id and value at the index. The stub loader * the default APIC id and value at the index. The stub loader