Add support for the SST-49LF004C, SST-49LF008C, SST-49LF016C in flashrom.
Also add suport for NVIDIA MCP55. Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu
Uwe Hermann
parent
6a5bc46579
commit
298f89850d
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@ -17,7 +17,8 @@ LDFLAGS = -lpci -lz -static
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OBJS = flash_enable.o udelay.o jedec.o sst28sf040.o am29f040b.o mx29f002.o \
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sst39sf020.o m29f400bt.o w49f002u.o 82802ab.o msys_doc.o pm49fl004.o \
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sst49lf040.o sst_fwhub.o layout.o lbtable.o flashchips.o flash_rom.o sharplhf00l04.o
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sst49lf040.o sst49lfxxxc.o sst_fwhub.o layout.o lbtable.o \
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flashchips.o flash_rom.o sharplhf00l04.o
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all: pciutils dep $(PROGRAM)
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@ -114,6 +114,9 @@ SST SST-49LF002A/B
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SST SST-49LF003A/B
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SST SST-49LF004A/B
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SST SST-49LF008A
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SST SST-49LF004C
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SST SST-49LF008C
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SST SST-49LF016C
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ST ST-M29F400BT
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ST ST-M29F040B
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SyncMOS S29C51001T/B
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@ -140,6 +143,7 @@ Intel ICH0-ICH8 (all variations)
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Intel PIIX4/PIIX4E/PIIX4M
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NVIDIA CK804
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NVIDIA MCP51
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NVIDIA MCP55
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SiS 630
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SiS 5595
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VIA VT8231
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@ -56,6 +56,9 @@ extern struct flashchip flashchips[];
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#define SST_49LF003A 0x1B /* SST 49LF003A device */
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#define SST_49LF004A 0x60 /* SST 49LF004A device */
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#define SST_49LF008A 0x5A /* SST 49LF008A device */
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#define SST_49LF004C 0x54 /* SST 49LF004C device */
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#define SST_49LF008C 0x59 /* SST 49LF008C device */
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#define SST_49LF016C 0x5C /* SST 49LF016C device */
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#define PMC_ID 0x9D /* PMC Manufacturer ID code */
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#define PMC_49FL002 0x6D /* PMC 49FL002 device code */
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@ -391,6 +391,46 @@ static int enable_flash_sb400(struct pci_dev *dev, char *name)
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return 0;
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}
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//By yhlu
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static int enable_flash_mcp55(struct pci_dev *dev, char *name)
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{
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/* register 4e.b gets or'ed with one */
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unsigned char old, new, byte;
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unsigned short word;
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/* if it fails, it fails. There are so many variations of broken mobos
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* that it is hard to argue that we should quit at this point.
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*/
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//dump_pci_device(dev);
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/* Set the 4MB enable bit bit */
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byte = pci_read_byte(dev, 0x88);
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byte |= 0xff; //256K
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pci_write_byte(dev, 0x88, byte);
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byte = pci_read_byte(dev, 0x8c);
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byte |= 0xff; //1M
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pci_write_byte(dev, 0x8c, byte);
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word = pci_read_word(dev, 0x90);
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word |= 0x7fff; //15M
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pci_write_word(dev, 0x90, word);
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old = pci_read_byte(dev, 0x6d);
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new = old | 0x01;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x6d, new);
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if (pci_read_byte(dev, 0x6d) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x6d, new, name);
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return -1;
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}
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return 0;
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}
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typedef struct penable {
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unsigned short vendor, device;
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char *name;
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@ -432,9 +472,13 @@ static FLASH_ENABLE enables[] = {
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{0x10de, 0x0260, "NVidia MCP51", enable_flash_ck804},
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{0x10de, 0x0261, "NVidia MCP51", enable_flash_ck804},
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// {0x10de, 0x0261, "NVIDIA C51", enable_flash_ck804}, // YHLU
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{0x10de, 0x0262, "NVidia MCP51", enable_flash_ck804},
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{0x10de, 0x0263, "NVidia MCP51", enable_flash_ck804},
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{0x10de, 0x0364, "NVIDIA MCP55", enable_flash_mcp55}, // LPC
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{0x10de, 0x0367, "NVIDIA MCP55", enable_flash_mcp55}, // Pro
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{0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, // ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80)
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};
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@ -31,6 +31,7 @@
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#endif
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#include "am29f040b.h"
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#include "sst28sf040.h"
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#include "sst49lfxxxc.h"
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#include "w49f002u.h"
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#include "sst39sf020.h"
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#include "sst49lf040.h"
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@ -82,6 +83,12 @@ struct flashchip flashchips[] = {
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probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub, NULL},
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{"Pm49FL002", PMC_ID, PMC_49FL002, NULL, 256, 16 * 1024,
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probe_jedec, erase_chip_jedec, write_49fl004,NULL},
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{"SST49LF004C", SST_ID, SST_49LF004C, NULL, 512, 4 * 1024,
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probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc,NULL},
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{"SST49LF008C", SST_ID, SST_49LF008C, NULL, 1024, 4 * 1024 ,
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probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc, NULL},
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{"SST49LF016C", SST_ID, SST_49LF016C, NULL, 2048, 4 * 1024 ,
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probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc, NULL},
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{"Pm49FL004", PMC_ID, PMC_49FL004, NULL, 512, 64 * 1024,
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probe_jedec, erase_chip_jedec, write_49fl004,NULL},
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{"W29C011", WINBOND_ID, W_29C011, NULL, 128, 128,
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@ -0,0 +1,204 @@
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/*
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* 49lfxxxc.c: driver for SST49LFXXXC flash models.
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*
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*
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* Copyright 2000 Silicon Integrated System Corporation
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* Copyright 2005 coresystems GmbH <stepan@openbios.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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* Reference:
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* SST49LFxxxC data sheets
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*
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <sys/io.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include "flash.h"
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#include "jedec.h"
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#include "debug.h"
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#define SECTOR_ERASE 0x30
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#define BLOCK_ERASE 0x20
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#define ERASE 0xD0
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#define AUTO_PGRM 0x10
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#define RESET 0xFF
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#define READ_ID 0x90
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#define READ_STATUS 0x70
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#define CLEAR_STATUS 0x50
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#define STATUS_BPS (1 << 1)
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#define STATUS_ESS (1 << 6)
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#define STATUS_WSMS (1 << 7)
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static __inline__ int write_lockbits_49lfxxxc(volatile uint8_t *bios, int size,
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unsigned char bits)
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{
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int i, left = size;
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unsigned long address;
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//printf("bios=0x%08lx\n", (unsigned long)bios);
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for (i = 0; left > 65536; i++, left -= 65536) {
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//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) );
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*(bios + (i * 65536) + 2) = bits;
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}
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address = i * 65536;
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//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
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*(bios + address + 2) = bits;
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address += 32768;
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//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
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*(bios + address + 2) = bits;
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address += 8192;
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//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
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*(bios + address + 2) = bits;
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address += 8192;
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//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
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*(bios + address + 2) = bits;
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return (0);
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}
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static __inline__ int erase_sector_49lfxxxc(volatile uint8_t *bios,
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unsigned long address)
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{
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unsigned char status;
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*bios = SECTOR_ERASE;
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*(bios + address) = ERASE;
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do {
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status = *bios;
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if (status & (STATUS_ESS | STATUS_BPS)) {
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printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status);
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*bios = CLEAR_STATUS;
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return(-1);
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}
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} while (!(status & STATUS_WSMS));
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return (0);
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}
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static __inline__ int write_sector_49lfxxxc(volatile uint8_t *bios,
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uint8_t *src,
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volatile uint8_t *dst,
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unsigned int page_size)
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{
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int i;
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unsigned char status;
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*bios = CLEAR_STATUS;
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for (i = 0; i < page_size; i++) {
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/* transfer data from source to destination */
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if (*src == 0xFF) {
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dst++, src++;
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/* If the data is 0xFF, don't program it */
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continue;
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}
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/*issue AUTO PROGRAM command */
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*bios = AUTO_PGRM;
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*dst++ = *src++;
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do {
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status = *bios;
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if (status & (STATUS_ESS | STATUS_BPS)) {
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printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status);
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*bios = CLEAR_STATUS;
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return(-1);
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}
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} while (!(status & STATUS_WSMS));
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}
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return (0);
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}
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int probe_49lfxxxc(struct flashchip *flash)
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{
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volatile uint8_t *bios = flash->virt_addr;
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uint8_t id1, id2;
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size_t size = flash->total_size * 1024;
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*bios = RESET;
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*bios = READ_ID;
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id1 = *(volatile uint8_t *) bios;
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id2 = *(volatile uint8_t *) (bios + 0x01);
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*bios = RESET;
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printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
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if (!(id1 == flash->manufacture_id && id2 == flash->model_id))
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return 0;
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bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
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flash->fd_mem, (off_t) (0xFFFFFFFF - 0x400000 - size + 1));
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if (bios == MAP_FAILED) {
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// it's this part but we can't map it ...
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perror("Error MMAP /dev/mem");
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exit(1);
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}
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flash->virt_addr_2 = bios;
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return 1;
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}
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int erase_49lfxxxc(struct flashchip *flash)
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{
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volatile uint8_t *bios = flash->virt_addr;
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volatile uint8_t *bios2 = flash->virt_addr_2;
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int i;
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unsigned int total_size = flash->total_size * 1024;
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write_lockbits_49lfxxxc(bios2, total_size, 0);
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for (i = 0; i < total_size; i += flash->page_size)
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if (erase_sector_49lfxxxc(bios, i) != 0 )
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return (-1);
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*bios = RESET;
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return (0);
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}
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int write_49lfxxxc(struct flashchip *flash, uint8_t *buf)
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{
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int i;
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int total_size = flash->total_size * 1024, page_size =
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flash->page_size;
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volatile uint8_t *bios = flash->virt_addr;
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write_lockbits_49lfxxxc(flash->virt_addr_2, total_size, 0);
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printf("Programming Page: ");
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for (i = 0; i < total_size / page_size; i++) {
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/* erase the page before programming */
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erase_sector_49lfxxxc(bios, i * page_size);
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/* write to the sector */
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printf("%04d at address: 0x%08x", i, i * page_size);
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write_sector_49lfxxxc(bios, buf + i * page_size,
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bios + i * page_size, page_size);
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printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
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}
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printf("\n");
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*bios = RESET;
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return (0);
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}
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@ -0,0 +1,8 @@
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#ifndef __SST49LFXXXC_H__
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#define __SST49LFXXXC_H__
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extern int probe_49lfxxxc(struct flashchip *flash);
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extern int erase_49lfxxxc(struct flashchip *flash);
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extern int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
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#endif /* !__SST49LFXXXC_H__ */
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