soc/intel/common/block/cpu: API to check if TME is supported

As per the Alder Lake FAS coreboot shall detect the existence of TME
feature by running the CPUID instruction:
CPUID leaf 7/sub-leaf 0
Return Value in ECX [bit 13]=1

If TME is supported then only access to TME MSRs are allowed otherwise
accessing those MSRs would result in GP#.

TEST=Able to detect the existence of TME feature across different
Alder Lake and Meteor Lake CPU SKUs.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ibd4fcf15a66d27748ac7fbb52b18d7264b901cd8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66749
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>

src/soc/intel/common/block/cpu/cpulib.c

@@ -501,3 +501,12 @@ void init_core_prmrr(void)
 	if (msr.lo & MTRR_CAP_PRMRR)
 		sync_core_prmrr();
 }
+
+bool is_tme_supported(void)
+{
+	struct cpuid_result cpuid_regs;
+
+	cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[13] is feature capability */
+
+	return (cpuid_regs.ecx & TME_SUPPORTED);
+}

src/soc/intel/common/block/include/intelblocks/cpulib.h

@@ -194,4 +194,12 @@ void get_cpu_topology_from_apicid(uint32_t apicid, uint8_t *package,
  */
 void init_core_prmrr(void);
 
+/*
+ * Check if TME is supported by the CPU
+ *
+ * coreboot shall detect the existence of TME feature by running CPUID instruction:
+ * CPUID leaf 7/sub-leaf 0: Return Value in ECX [bit 13] = 1
+ */
+bool is_tme_supported(void);
+
 #endif	/* SOC_INTEL_COMMON_BLOCK_CPULIB_H */

src/soc/intel/common/block/include/intelblocks/msr.h

@@ -106,5 +106,6 @@
 #define SMRR_LOCK_SUPPORTED		(1<<14)
 
 #define SGX_SUPPORTED	(1<<2)
+#define TME_SUPPORTED	(1<<13)
 
 #endif	/* SOC_INTEL_COMMON_MSR_H */