diff --git a/src/southbridge/amd/rs780/rs780_gfx.c b/src/southbridge/amd/rs780/rs780_gfx.c
index 18836675e0..1763c36047 100644
--- a/src/southbridge/amd/rs780/rs780_gfx.c
+++ b/src/southbridge/amd/rs780/rs780_gfx.c
@@ -1302,8 +1302,10 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
 		if(is_dev3_present()){
 			/* step 1, lane reversal (only need if CMOS option is enabled) */
 			if (cfg->gfx_lane_reversal) {
+				set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 1 << 31);
 				set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2);
 				set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 3, 1 << 3);
+				set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 0 << 31);
 			}
 			printk(BIOS_DEBUG, "rs780_gfx_init step1.\n");
 			/* step 1.1, dual-slot gfx configuration (only need if CMOS option is enabled) */
@@ -1317,10 +1319,11 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
 
 		}else{
 			if (cfg->gfx_lane_reversal) {
+				set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 1 << 31);
 				set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2);
+				set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 0 << 31);
 			}
 			printk(BIOS_DEBUG, "rs780_gfx_init step1.\n");
-			printk(BIOS_DEBUG, "rs780_gfx_init step2.\n");
 
 			if((dev->path.pci.devfn >> 3) == 2)
 				single_port_configuration(nb_dev, dev);