Move the v3 resource allocator to v2.
Major changes: 1. Separate resource allocation into: A. Read Resources B. Avoid fixed resources (constrain limits) C. Allocate resources D. Set resources Usage notes: Resources which have IORESOURCE_FIXED set in the flags constrain the placement of other resources. All fixed resources will end up outside (above or below) the allocated resources. Domains usually start with base = 0 and limit = 2^address_bits - 1. I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is still there for resources. Some platforms may want to change that, but I didn't want to break anyone's board. Resources are allocated in a single block for memory and another for I/O. Currently the resource allocator doesn't support holes. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
2468331952
commit
29cc9eda20
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@ -62,9 +62,27 @@ void sc520_enable_resources(struct device *dev) {
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}
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}
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static void sc520_read_resources(device_t dev)
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{
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struct resource* res;
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pci_dev_read_resources(dev);
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res = new_resource(dev, 1);
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res->base = 0x0UL;
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res->size = 0x400UL;
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res->limit = 0xffffUL;
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res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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res = new_resource(dev, 3); /* IOAPIC */
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res->base = 0xfec00000;
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res->size = 0x00001000;
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res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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}
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static struct device_operations cpu_operations = {
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static struct device_operations cpu_operations = {
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.read_resources = pci_dev_read_resources,
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.read_resources = sc520_read_resources,
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.set_resources = pci_dev_set_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = sc520_enable_resources,
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.enable_resources = sc520_enable_resources,
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.init = cpu_init,
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.init = cpu_init,
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@ -78,25 +96,6 @@ static const struct pci_driver cpu_driver __pci_driver = {
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.device = 0x3000
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.device = 0x3000
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};
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};
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#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
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static void pci_domain_read_resources(device_t dev)
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{
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struct resource *resource;
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printk_spew("%s\n", __func__);
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/* Initialize the system wide io space constraints */
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resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
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resource->limit = 0xffffUL;
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resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
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/* Initialize the system wide memory resources constraints */
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resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
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resource->limit = 0xffffffffULL;
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resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
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}
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static void ram_resource(device_t dev, unsigned long index,
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static void ram_resource(device_t dev, unsigned long index,
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unsigned long basek, unsigned long sizek)
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unsigned long basek, unsigned long sizek)
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{
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{
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@ -184,14 +183,6 @@ static void pci_domain_set_resources(device_t dev)
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assign_resources(&dev->link[0]);
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assign_resources(&dev->link[0]);
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}
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}
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static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
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{
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printk_spew("%s\n", __func__);
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max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
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return max;
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}
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#if 0
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#if 0
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void sc520_enable_resources(device_t dev) {
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void sc520_enable_resources(device_t dev) {
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@ -219,7 +210,7 @@ static struct device_operations pci_domain_ops = {
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* If enable_resources is set to the generic enable_resources
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* If enable_resources is set to the generic enable_resources
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* function the whole thing will hang in an endless loop on
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* function the whole thing will hang in an endless loop on
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* the ts5300. If this is really needed on another platform,
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* the ts5300. If this is really needed on another platform,
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* something is conceptionally wrong.
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* something is conceptually wrong.
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*/
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*/
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.enable_resources = 0, //enable_resources,
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.enable_resources = 0, //enable_resources,
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.init = 0,
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.init = 0,
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@ -9,23 +9,6 @@
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#include "chip.h"
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#include "chip.h"
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#include "northbridge.h"
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#include "northbridge.h"
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#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
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static void pci_domain_read_resources(device_t dev)
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{
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struct resource *resource;
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/* Initialize the system wide io space constraints */
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resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
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resource->limit = 0xffffUL;
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resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
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/* Initialize the system wide memory resources constraints */
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resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
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resource->limit = 0xffffffffULL;
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resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
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}
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static void ram_resource(device_t dev, unsigned long index,
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static void ram_resource(device_t dev, unsigned long index,
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unsigned long basek, unsigned long sizek)
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unsigned long basek, unsigned long sizek)
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{
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{
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@ -70,7 +53,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
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extern uint64_t high_tables_base, high_tables_size;
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extern uint64_t high_tables_base, high_tables_size;
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#endif
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#endif
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static void pci_domain_set_resources(device_t dev)
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static void cpu_pci_domain_set_resources(device_t dev)
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{
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{
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static const uint8_t ramregs[] = {
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static const uint8_t ramregs[] = {
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0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57
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0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57
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@ -127,15 +110,34 @@ static void pci_domain_set_resources(device_t dev)
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assign_resources(&dev->link[0]);
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assign_resources(&dev->link[0]);
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}
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}
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static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
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static void cpu_pci_domain_read_resources(struct device *dev)
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{
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{
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max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
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struct resource *res;
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return max;
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pci_domain_read_resources(dev);
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/* Reserve space for the IOAPIC. This should be in the Southbridge,
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* but I couldn't tell which device to put it in. */
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res = new_resource(dev, 2);
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res->base = 0xfec00000UL;
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res->size = 0x100000UL;
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res->limit = 0xffffffffUL;
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res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
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IORESOURCE_ASSIGNED;
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/* Reserve space for the LAPIC. There's one in every processor, but
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* the space only needs to be reserved once, so we do it here. */
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res = new_resource(dev, 3);
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res->base = 0xfee00000UL;
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res->size = 0x10000UL;
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res->limit = 0xffffffffUL;
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res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
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IORESOURCE_ASSIGNED;
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}
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}
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static struct device_operations pci_domain_ops = {
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static struct device_operations pci_domain_ops = {
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.read_resources = pci_domain_read_resources,
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.read_resources = cpu_pci_domain_read_resources,
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.set_resources = pci_domain_set_resources,
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.set_resources = cpu_pci_domain_set_resources,
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.enable_resources = enable_childrens_resources,
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.enable_resources = enable_childrens_resources,
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.init = 0,
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.init = 0,
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.scan_bus = pci_domain_scan_bus,
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.scan_bus = pci_domain_scan_bus,
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@ -7,27 +7,6 @@
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#include <device/pci_ids.h>
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#include <device/pci_ids.h>
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#include <console/console.h>
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#include <console/console.h>
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static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
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{
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max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
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return max;
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}
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static void pci_domain_read_resources(device_t dev)
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{
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struct resource *resource;
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/* Initialize the system wide io space constraints */
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resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
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resource->limit = 0xffffUL;
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resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
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/* Initialize the system wide memory resources constraints */
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resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
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resource->limit = 0xffffffffULL;
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resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
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}
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static void ram_resource(device_t dev, unsigned long index,
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static void ram_resource(device_t dev, unsigned long index,
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unsigned long basek, unsigned long sizek)
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unsigned long basek, unsigned long sizek)
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{
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{
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@ -77,8 +77,6 @@ static void cardbus_size_bridge_resource(device_t dev, unsigned index)
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resource = find_resource(dev, index);
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resource = find_resource(dev, index);
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if (resource) {
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if (resource) {
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min_size = resource->size;
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min_size = resource->size;
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compute_allocate_resource(&dev->link[0], resource,
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resource->flags, resource->flags);
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/* Allways allocate at least the miniumum size to a
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/* Allways allocate at least the miniumum size to a
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* cardbus bridge in case a new card is plugged in.
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* cardbus bridge in case a new card is plugged in.
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*/
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*/
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File diff suppressed because it is too large
Load Diff
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@ -487,7 +487,7 @@ void search_bus_resources(struct bus *bus,
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for(curdev = bus->children; curdev; curdev = curdev->sibling) {
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for(curdev = bus->children; curdev; curdev = curdev->sibling) {
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int i;
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int i;
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/* Ignore disabled devices */
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/* Ignore disabled devices */
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if (!curdev->have_resources) continue;
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if (!curdev->enabled) continue;
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for(i = 0; i < curdev->resources; i++) {
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for(i = 0; i < curdev->resources; i++) {
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struct resource *resource = &curdev->resource[i];
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struct resource *resource = &curdev->resource[i];
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/* If it isn't the right kind of resource ignore it */
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/* If it isn't the right kind of resource ignore it */
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@ -514,7 +514,7 @@ void search_global_resources(
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for(curdev = all_devices; curdev; curdev = curdev->next) {
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for(curdev = all_devices; curdev; curdev = curdev->next) {
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int i;
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int i;
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/* Ignore disabled devices */
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/* Ignore disabled devices */
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if (!curdev->have_resources) continue;
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if (!curdev->enabled) continue;
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for(i = 0; i < curdev->resources; i++) {
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for(i = 0; i < curdev->resources; i++) {
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struct resource *resource = &curdev->resource[i];
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struct resource *resource = &curdev->resource[i];
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/* If it isn't the right kind of resource ignore it */
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/* If it isn't the right kind of resource ignore it */
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File diff suppressed because it is too large
Load Diff
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@ -34,29 +34,7 @@
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*/
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*/
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void root_dev_read_resources(device_t root)
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void root_dev_read_resources(device_t root)
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{
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{
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struct resource *resource;
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printk_err("%s should never be called.\n", __func__);
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/* Initialize the system wide io space constraints */
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resource = new_resource(root, 0);
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resource->base = 0x400;
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resource->size = 0;
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resource->align = 0;
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resource->gran = 0;
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resource->limit = 0xffffUL;
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resource->flags = IORESOURCE_IO;
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compute_allocate_resource(&root->link[0], resource,
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IORESOURCE_IO, IORESOURCE_IO);
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/* Initialize the system wide memory resources constraints */
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resource = new_resource(root, 1);
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resource->base = 0;
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resource->size = 0;
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resource->align = 0;
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resource->gran = 0;
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resource->limit = 0xffffffffUL;
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resource->flags = IORESOURCE_MEM;
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compute_allocate_resource(&root->link[0], resource,
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IORESOURCE_MEM, IORESOURCE_MEM);
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}
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}
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/**
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/**
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@ -68,14 +46,7 @@ void root_dev_read_resources(device_t root)
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*/
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*/
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void root_dev_set_resources(device_t root)
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void root_dev_set_resources(device_t root)
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{
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{
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struct bus *bus;
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printk_err("%s should never be called.\n", __func__);
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bus = &root->link[0];
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compute_allocate_resource(bus,
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&root->resource[0], IORESOURCE_IO, IORESOURCE_IO);
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compute_allocate_resource(bus,
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&root->resource[1], IORESOURCE_MEM, IORESOURCE_MEM);
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assign_resources(bus);
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}
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}
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/**
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/**
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unsigned int hdr_type; /* PCI header type */
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unsigned int hdr_type; /* PCI header type */
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unsigned int enabled : 1; /* set if we should enable the device */
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unsigned int enabled : 1; /* set if we should enable the device */
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unsigned int initialized : 1; /* set if we have initialized the device */
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unsigned int initialized : 1; /* set if we have initialized the device */
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unsigned int have_resources : 1; /* Set if we have read the devices resources */
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unsigned int on_mainboard : 1;
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unsigned int on_mainboard : 1;
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unsigned long rom_address;
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unsigned long rom_address;
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uint8_t command;
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u8 command;
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/* Base registers for this device. I/O, MEM and Expansion ROM */
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/* Base registers for this device. I/O, MEM and Expansion ROM */
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struct resource resource[MAX_RESOURCES];
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struct resource resource[MAX_RESOURCES];
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unsigned int resources;
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unsigned int resources;
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/* link are (down stream) buses attached to the device, usually a leaf
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/* links are (downstream) buses attached to the device, usually a leaf
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* device with no children have 0 buses attached and a bridge has 1 bus
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* device with no children have 0 buses attached and a bridge has 1 bus
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*/
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*/
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struct bus link[MAX_LINKS];
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struct bus link[MAX_LINKS];
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@ -106,8 +105,6 @@ void dev_optimize(void);
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/* Generic device helper functions */
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/* Generic device helper functions */
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int reset_bus(struct bus *bus);
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int reset_bus(struct bus *bus);
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unsigned int scan_bus(struct device *bus, unsigned int max);
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unsigned int scan_bus(struct device *bus, unsigned int max);
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void compute_allocate_resource(struct bus *bus, struct resource *bridge,
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unsigned long type_mask, unsigned long type);
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void assign_resources(struct bus *bus);
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void assign_resources(struct bus *bus);
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void enable_resources(struct device *dev);
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void enable_resources(struct device *dev);
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void enumerate_static_device(void);
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void enumerate_static_device(void);
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@ -142,6 +139,8 @@ void show_all_devs_resources(int debug_level, const char* msg);
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#define DEVICE_MEM_ALIGN 4096
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#define DEVICE_MEM_ALIGN 4096
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extern struct device_operations default_dev_ops_root;
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extern struct device_operations default_dev_ops_root;
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void pci_domain_read_resources(struct device *dev);
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unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max);
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void root_dev_read_resources(device_t dev);
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void root_dev_read_resources(device_t dev);
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void root_dev_set_resources(device_t dev);
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void root_dev_set_resources(device_t dev);
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unsigned int scan_static_bus(device_t bus, unsigned int max);
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unsigned int scan_static_bus(device_t bus, unsigned int max);
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@ -1,5 +1,5 @@
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#ifndef RESOURCE_H
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#ifndef DEVICE_RESOURCE_H
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#define RESOURCE_H
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#define DEVICE_RESOURCE_H
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#include <stdint.h>
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#include <stdint.h>
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@ -19,6 +19,7 @@
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#define IORESOURCE_SUBTRACTIVE 0x00040000 /* This resource filters all of the unclaimed transactions
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#define IORESOURCE_SUBTRACTIVE 0x00040000 /* This resource filters all of the unclaimed transactions
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* to the bus below.
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* to the bus below.
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*/
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*/
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#define IORESOURCE_BRIDGE 0x00080000 /* The IO resource has a bus below it. */
|
||||||
#define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */
|
#define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */
|
||||||
#define IORESOURCE_ASSIGNED 0x40000000 /* An IO resource that has been assigned a value */
|
#define IORESOURCE_ASSIGNED 0x40000000 /* An IO resource that has been assigned a value */
|
||||||
#define IORESOURCE_FIXED 0x80000000 /* An IO resource the allocator must not change */
|
#define IORESOURCE_FIXED 0x80000000 /* An IO resource the allocator must not change */
|
||||||
|
@ -62,7 +63,7 @@
|
||||||
#define IORESOURCE_MEM_EXPANSIONROM (1<<6)
|
#define IORESOURCE_MEM_EXPANSIONROM (1<<6)
|
||||||
|
|
||||||
|
|
||||||
typedef uint64_t resource_t;
|
typedef u64 resource_t;
|
||||||
struct resource {
|
struct resource {
|
||||||
resource_t base; /* Base address of the resource */
|
resource_t base; /* Base address of the resource */
|
||||||
resource_t size; /* Size of the resource */
|
resource_t size; /* Size of the resource */
|
||||||
|
@ -74,10 +75,14 @@ struct resource {
|
||||||
/* Alignment must be >= the granularity of the resource */
|
/* Alignment must be >= the granularity of the resource */
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Macros to generate index values for subtractive resources */
|
/* Macros to generate index values for resources */
|
||||||
#define IOINDEX_SUBTRACTIVE(IDX,LINK) (0x10000000 + ((IDX) << 8) + LINK)
|
#define IOINDEX_SUBTRACTIVE(IDX,LINK) (0x10000000 + ((IDX) << 8) + LINK)
|
||||||
#define IOINDEX_SUBTRACTIVE_LINK(IDX) (IDX & 0xff)
|
#define IOINDEX_SUBTRACTIVE_LINK(IDX) (IDX & 0xff)
|
||||||
|
|
||||||
|
#define IOINDEX(IDX,LINK) (((LINK) << 16) + IDX)
|
||||||
|
#define IOINDEX_LINK(IDX) (( IDX & 0xf0000) >> 16)
|
||||||
|
#define IOINDEX_IDX(IDX) (IDX & 0xffff)
|
||||||
|
|
||||||
/* Generic resource helper functions */
|
/* Generic resource helper functions */
|
||||||
struct device;
|
struct device;
|
||||||
struct bus;
|
struct bus;
|
||||||
|
@ -101,4 +106,4 @@ extern void search_global_resources(
|
||||||
#define RESOURCE_TYPE_MAX 20
|
#define RESOURCE_TYPE_MAX 20
|
||||||
extern const char *resource_type(struct resource *resource);
|
extern const char *resource_type(struct resource *resource);
|
||||||
|
|
||||||
#endif /* RESOURCE_H */
|
#endif /* DEVICE_RESOURCE_H */
|
||||||
|
|
|
@ -341,7 +341,7 @@ static int reg_useable(u32 reg,device_t goal_dev, u32 goal_nodeid,
|
||||||
if (!dev)
|
if (!dev)
|
||||||
continue;
|
continue;
|
||||||
for(link = 0; !res && (link < 8); link++) {
|
for(link = 0; !res && (link < 8); link++) {
|
||||||
res = probe_resource(dev, 0x1000 + reg + (link<<16)); // 8 links, 0x1000 man f1,
|
res = probe_resource(dev, IOINDEX(0x1000 + reg, link));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
result = 2;
|
result = 2;
|
||||||
|
@ -385,7 +385,7 @@ static struct resource *amdfam10_find_iopair(device_t dev, u32 nodeid, u32 link)
|
||||||
reg = 0x110+ (index<<24) + (4<<20); // index could be 0, 255
|
reg = 0x110+ (index<<24) + (4<<20); // index could be 0, 255
|
||||||
}
|
}
|
||||||
|
|
||||||
resource = new_resource(dev, 0x1000 + reg + (link<<16));
|
resource = new_resource(dev, IOINDEX(0x1000 + reg, link));
|
||||||
|
|
||||||
return resource;
|
return resource;
|
||||||
}
|
}
|
||||||
|
@ -421,7 +421,7 @@ static struct resource *amdfam10_find_mempair(device_t dev, u32 nodeid, u32 link
|
||||||
reg = 0x110+ (index<<24) + (6<<20); // index could be 0, 63
|
reg = 0x110+ (index<<24) + (6<<20); // index could be 0, 63
|
||||||
|
|
||||||
}
|
}
|
||||||
resource = new_resource(dev, 0x1000 + reg + (link<<16));
|
resource = new_resource(dev, IOINDEX(0x1000 + reg, link));
|
||||||
return resource;
|
return resource;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -447,8 +447,6 @@ static void amdfam10_link_read_bases(device_t dev, u32 nodeid, u32 link)
|
||||||
resource->gran = align;
|
resource->gran = align;
|
||||||
resource->limit = 0xffffUL;
|
resource->limit = 0xffffUL;
|
||||||
resource->flags = IORESOURCE_IO;
|
resource->flags = IORESOURCE_IO;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_IO, IORESOURCE_IO);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize the prefetchable memory constraints on the current bus */
|
/* Initialize the prefetchable memory constraints on the current bus */
|
||||||
|
@ -460,9 +458,6 @@ static void amdfam10_link_read_bases(device_t dev, u32 nodeid, u32 link)
|
||||||
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
||||||
resource->limit = 0xffffffffffULL;
|
resource->limit = 0xffffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH);
|
|
||||||
|
|
||||||
#if CONFIG_EXT_CONF_SUPPORT == 1
|
#if CONFIG_EXT_CONF_SUPPORT == 1
|
||||||
if((resource->index & 0x1fff) == 0x1110) { // ext
|
if((resource->index & 0x1fff) == 0x1110) { // ext
|
||||||
|
@ -481,9 +476,6 @@ static void amdfam10_link_read_bases(device_t dev, u32 nodeid, u32 link)
|
||||||
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
||||||
resource->limit = 0xffffffffffULL;
|
resource->limit = 0xffffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM;
|
resource->flags = IORESOURCE_MEM;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM);
|
|
||||||
|
|
||||||
#if CONFIG_EXT_CONF_SUPPORT == 1
|
#if CONFIG_EXT_CONF_SUPPORT == 1
|
||||||
if((resource->index & 0x1fff) == 0x1110) { // ext
|
if((resource->index & 0x1fff) == 0x1110) { // ext
|
||||||
|
@ -541,19 +533,14 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource,
|
||||||
|
|
||||||
/* Get the register and link */
|
/* Get the register and link */
|
||||||
reg = resource->index & 0xfff; // 4k
|
reg = resource->index & 0xfff; // 4k
|
||||||
link = ( resource->index>> 16)& 0x7; // 8 links
|
link = IOINDEX_LINK(resource->index);
|
||||||
|
|
||||||
if (resource->flags & IORESOURCE_IO) {
|
if (resource->flags & IORESOURCE_IO) {
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_IO, IORESOURCE_IO);
|
|
||||||
|
|
||||||
set_io_addr_reg(dev, nodeid, link, reg, rbase>>8, rend>>8);
|
set_io_addr_reg(dev, nodeid, link, reg, rbase>>8, rend>>8);
|
||||||
store_conf_io_addr(nodeid, link, reg, (resource->index >> 24), rbase>>8, rend>>8);
|
store_conf_io_addr(nodeid, link, reg, (resource->index >> 24), rbase>>8, rend>>8);
|
||||||
}
|
}
|
||||||
else if (resource->flags & IORESOURCE_MEM) {
|
else if (resource->flags & IORESOURCE_MEM) {
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
resource->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH));
|
|
||||||
set_mmio_addr_reg(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes) ;// [39:8]
|
set_mmio_addr_reg(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes) ;// [39:8]
|
||||||
store_conf_mmio_addr(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8);
|
store_conf_mmio_addr(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8);
|
||||||
}
|
}
|
||||||
|
@ -657,7 +644,7 @@ struct chip_operations northbridge_amd_amdfam10_ops = {
|
||||||
.enable_dev = 0,
|
.enable_dev = 0,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
static void amdfam10_domain_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
unsigned reg;
|
unsigned reg;
|
||||||
|
@ -672,20 +659,20 @@ static void pci_domain_read_resources(device_t dev)
|
||||||
/* Is this register allocated? */
|
/* Is this register allocated? */
|
||||||
if ((base & 3) != 0) {
|
if ((base & 3) != 0) {
|
||||||
unsigned nodeid, link;
|
unsigned nodeid, link;
|
||||||
device_t dev;
|
device_t reg_dev;
|
||||||
if(reg<0xc0) { // mmio
|
if(reg<0xc0) { // mmio
|
||||||
nodeid = (limit & 0xf) + (base&0x30);
|
nodeid = (limit & 0xf) + (base&0x30);
|
||||||
} else { // io
|
} else { // io
|
||||||
nodeid = (limit & 0xf) + ((base>>4)&0x30);
|
nodeid = (limit & 0xf) + ((base>>4)&0x30);
|
||||||
}
|
}
|
||||||
link = (limit >> 4) & 7;
|
link = (limit >> 4) & 7;
|
||||||
dev = __f0_dev[nodeid];
|
reg_dev = __f0_dev[nodeid];
|
||||||
if (dev) {
|
if (reg_dev) {
|
||||||
/* Reserve the resource */
|
/* Reserve the resource */
|
||||||
struct resource *resource;
|
struct resource *reg_resource;
|
||||||
resource = new_resource(dev, 0x1000 + reg + (link<<16));
|
reg_resource = new_resource(reg_dev, IOINDEX(0x1000 + reg, link));
|
||||||
if (resource) {
|
if (reg_resource) {
|
||||||
resource->flags = 1;
|
reg_resource->flags = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -711,24 +698,16 @@ static void pci_domain_read_resources(device_t dev)
|
||||||
resource->base = 0x400;
|
resource->base = 0x400;
|
||||||
resource->limit = 0xffffUL;
|
resource->limit = 0xffffUL;
|
||||||
resource->flags = IORESOURCE_IO;
|
resource->flags = IORESOURCE_IO;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_IO, IORESOURCE_IO);
|
|
||||||
|
|
||||||
/* Initialize the system wide prefetchable memory resources constraints */
|
/* Initialize the system wide prefetchable memory resources constraints */
|
||||||
resource = new_resource(dev, 1|(link<<2));
|
resource = new_resource(dev, 1|(link<<2));
|
||||||
resource->limit = 0xfcffffffffULL;
|
resource->limit = 0xfcffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH);
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
/* Initialize the system wide memory resources constraints */
|
||||||
resource = new_resource(dev, 2|(link<<2));
|
resource = new_resource(dev, 2|(link<<2));
|
||||||
resource->limit = 0xfcffffffffULL;
|
resource->limit = 0xfcffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM;
|
resource->flags = IORESOURCE_MEM;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM);
|
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
@ -770,10 +749,6 @@ static u32 find_pci_tolm(struct bus *bus, u32 tolm)
|
||||||
return tolm;
|
return tolm;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
|
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
|
||||||
|
|
||||||
struct hw_mem_hole_info {
|
struct hw_mem_hole_info {
|
||||||
|
@ -980,9 +955,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
resource->flags |= IORESOURCE_ASSIGNED;
|
resource->flags |= IORESOURCE_ASSIGNED;
|
||||||
resource->flags &= ~IORESOURCE_STORED;
|
resource->flags &= ~IORESOURCE_STORED;
|
||||||
link = (resource>>2) & 3;
|
link = (resource>>2) & 3;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
|
|
||||||
|
|
||||||
resource->flags |= IORESOURCE_STORED;
|
resource->flags |= IORESOURCE_STORED;
|
||||||
report_resource_stored(dev, resource, "");
|
report_resource_stored(dev, resource, "");
|
||||||
|
|
||||||
|
@ -1142,7 +1114,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static u32 pci_domain_scan_bus(device_t dev, u32 max)
|
static u32 amdfam10_domain_scan_bus(device_t dev, u32 max)
|
||||||
{
|
{
|
||||||
u32 reg;
|
u32 reg;
|
||||||
int i;
|
int i;
|
||||||
|
@ -1192,11 +1164,11 @@ static u32 pci_domain_scan_bus(device_t dev, u32 max)
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = amdfam10_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = amdfam10_domain_scan_bus,
|
||||||
#if CONFIG_MMCONF_SUPPORT_DEFAULT
|
#if CONFIG_MMCONF_SUPPORT_DEFAULT
|
||||||
.ops_pci_bus = &pci_ops_mmconf,
|
.ops_pci_bus = &pci_ops_mmconf,
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -53,7 +53,7 @@ static void mcf3_read_resources(device_t dev)
|
||||||
if (iommu) {
|
if (iommu) {
|
||||||
/* Add a Gart apeture resource */
|
/* Add a Gart apeture resource */
|
||||||
resource = new_resource(dev, 0x94);
|
resource = new_resource(dev, 0x94);
|
||||||
resource->size = iommu?CONFIG_AGP_APERTURE_SIZE:1;
|
resource->size = CONFIG_AGP_APERTURE_SIZE;
|
||||||
resource->align = log2(resource->size);
|
resource->align = log2(resource->size);
|
||||||
resource->gran = log2(resource->size);
|
resource->gran = log2(resource->size);
|
||||||
resource->limit = 0xffffffff; /* 4G */
|
resource->limit = 0xffffffff; /* 4G */
|
||||||
|
|
|
@ -297,7 +297,7 @@ static int reg_useable(unsigned reg,
|
||||||
if (!dev)
|
if (!dev)
|
||||||
continue;
|
continue;
|
||||||
for(link = 0; !res && (link < 3); link++) {
|
for(link = 0; !res && (link < 3); link++) {
|
||||||
res = probe_resource(dev, 0x100 + (reg | link));
|
res = probe_resource(dev, IOINDEX(0x100 + reg, link));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
result = 2;
|
result = 2;
|
||||||
|
@ -335,7 +335,7 @@ static struct resource *amdk8_find_iopair(device_t dev, unsigned nodeid, unsigne
|
||||||
reg = free_reg;
|
reg = free_reg;
|
||||||
}
|
}
|
||||||
if (reg > 0) {
|
if (reg > 0) {
|
||||||
resource = new_resource(dev, 0x100 + (reg | link));
|
resource = new_resource(dev, IOINDEX(0x100 + reg, link));
|
||||||
}
|
}
|
||||||
return resource;
|
return resource;
|
||||||
}
|
}
|
||||||
|
@ -362,7 +362,7 @@ static struct resource *amdk8_find_mempair(device_t dev, unsigned nodeid, unsign
|
||||||
reg = free_reg;
|
reg = free_reg;
|
||||||
}
|
}
|
||||||
if (reg > 0) {
|
if (reg > 0) {
|
||||||
resource = new_resource(dev, 0x100 + (reg | link));
|
resource = new_resource(dev, IOINDEX(0x100 + reg, link));
|
||||||
}
|
}
|
||||||
return resource;
|
return resource;
|
||||||
}
|
}
|
||||||
|
@ -379,9 +379,7 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link)
|
||||||
resource->align = log2(HT_IO_HOST_ALIGN);
|
resource->align = log2(HT_IO_HOST_ALIGN);
|
||||||
resource->gran = log2(HT_IO_HOST_ALIGN);
|
resource->gran = log2(HT_IO_HOST_ALIGN);
|
||||||
resource->limit = 0xffffUL;
|
resource->limit = 0xffffUL;
|
||||||
resource->flags = IORESOURCE_IO;
|
resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_IO, IORESOURCE_IO);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize the prefetchable memory constraints on the current bus */
|
/* Initialize the prefetchable memory constraints on the current bus */
|
||||||
|
@ -393,9 +391,9 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link)
|
||||||
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
||||||
resource->limit = 0xffffffffffULL;
|
resource->limit = 0xffffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
#ifdef CONFIG_PCI_64BIT_PREF_MEM
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
resource->flags |= IORESOURCE_BRIDGE;
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH);
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize the memory constraints on the current bus */
|
/* Initialize the memory constraints on the current bus */
|
||||||
|
@ -405,11 +403,8 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link)
|
||||||
resource->size = 0;
|
resource->size = 0;
|
||||||
resource->align = log2(HT_MEM_HOST_ALIGN);
|
resource->align = log2(HT_MEM_HOST_ALIGN);
|
||||||
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
resource->gran = log2(HT_MEM_HOST_ALIGN);
|
||||||
resource->limit = 0xffffffffffULL;
|
resource->limit = 0xffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM;
|
resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -432,11 +427,15 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
|
||||||
|
|
||||||
/* Make certain the resource has actually been set */
|
/* Make certain the resource has actually been set */
|
||||||
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
|
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
|
||||||
|
printk_err("%s: can't set unassigned resource @%lx %lx\n",
|
||||||
|
__func__, resource->index, resource->flags);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If I have already stored this resource don't worry about it */
|
/* If I have already stored this resource don't worry about it */
|
||||||
if (resource->flags & IORESOURCE_STORED) {
|
if (resource->flags & IORESOURCE_STORED) {
|
||||||
|
printk_err("%s: can't set stored resource @%lx %lx\n", __func__,
|
||||||
|
resource->index, resource->flags);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -448,6 +447,10 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
|
||||||
if (resource->index < 0x100) {
|
if (resource->index < 0x100) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (resource->size == 0)
|
||||||
|
return;
|
||||||
|
|
||||||
/* Get the base address */
|
/* Get the base address */
|
||||||
rbase = resource->base;
|
rbase = resource->base;
|
||||||
|
|
||||||
|
@ -456,12 +459,10 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
|
||||||
|
|
||||||
/* Get the register and link */
|
/* Get the register and link */
|
||||||
reg = resource->index & 0xfc;
|
reg = resource->index & 0xfc;
|
||||||
link = resource->index & 3;
|
link = IOINDEX_LINK(resource->index);
|
||||||
|
|
||||||
if (resource->flags & IORESOURCE_IO) {
|
if (resource->flags & IORESOURCE_IO) {
|
||||||
uint32_t base, limit;
|
uint32_t base, limit;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_IO, IORESOURCE_IO);
|
|
||||||
base = f1_read_config32(reg);
|
base = f1_read_config32(reg);
|
||||||
limit = f1_read_config32(reg + 0x4);
|
limit = f1_read_config32(reg + 0x4);
|
||||||
base &= 0xfe000fcc;
|
base &= 0xfe000fcc;
|
||||||
|
@ -486,9 +487,6 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
|
||||||
}
|
}
|
||||||
else if (resource->flags & IORESOURCE_MEM) {
|
else if (resource->flags & IORESOURCE_MEM) {
|
||||||
uint32_t base, limit;
|
uint32_t base, limit;
|
||||||
compute_allocate_resource(&dev->link[link], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
resource->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH));
|
|
||||||
base = f1_read_config32(reg);
|
base = f1_read_config32(reg);
|
||||||
limit = f1_read_config32(reg + 0x4);
|
limit = f1_read_config32(reg + 0x4);
|
||||||
base &= 0x000000f0;
|
base &= 0x000000f0;
|
||||||
|
@ -634,7 +632,7 @@ struct chip_operations northbridge_amd_amdk8_ops = {
|
||||||
.enable_dev = 0,
|
.enable_dev = 0,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
static void amdk8_domain_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
unsigned reg;
|
unsigned reg;
|
||||||
|
@ -655,48 +653,21 @@ static void pci_domain_read_resources(device_t dev)
|
||||||
if (reg_dev) {
|
if (reg_dev) {
|
||||||
/* Reserve the resource */
|
/* Reserve the resource */
|
||||||
struct resource *reg_resource;
|
struct resource *reg_resource;
|
||||||
reg_resource = new_resource(reg_dev, 0x100 + (reg | link));
|
reg_resource = new_resource(reg_dev, IOINDEX(0x100 + reg, link));
|
||||||
if (reg_resource) {
|
if (reg_resource) {
|
||||||
reg_resource->flags = 1;
|
reg_resource->flags = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 0
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->base = 0x400;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
pci_domain_read_resources(dev);
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xfcffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
#else
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, 0);
|
|
||||||
resource->base = 0x400;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO;
|
|
||||||
compute_allocate_resource(&dev->link[0], resource,
|
|
||||||
IORESOURCE_IO, IORESOURCE_IO);
|
|
||||||
|
|
||||||
|
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
||||||
/* Initialize the system wide prefetchable memory resources constraints */
|
/* Initialize the system wide prefetchable memory resources constraints */
|
||||||
resource = new_resource(dev, 1);
|
|
||||||
resource->limit = 0xfcffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
|
||||||
compute_allocate_resource(&dev->link[0], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH);
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, 2);
|
resource = new_resource(dev, 2);
|
||||||
resource->limit = 0xfcffffffffULL;
|
resource->limit = 0xfcffffffffULL;
|
||||||
resource->flags = IORESOURCE_MEM;
|
resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||||
compute_allocate_resource(&dev->link[0], resource,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM);
|
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -739,10 +710,6 @@ static uint32_t find_pci_tolm(struct bus *bus)
|
||||||
return tolm;
|
return tolm;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
|
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
|
||||||
|
|
||||||
struct hw_mem_hole_info {
|
struct hw_mem_hole_info {
|
||||||
|
@ -898,7 +865,7 @@ static uint32_t hoist_memory(unsigned long hole_startk, int i)
|
||||||
extern uint64_t high_tables_base, high_tables_size;
|
extern uint64_t high_tables_base, high_tables_size;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static void pci_domain_set_resources(device_t dev)
|
static void amdk8_domain_set_resources(device_t dev)
|
||||||
{
|
{
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
||||||
struct resource *io, *mem1, *mem2;
|
struct resource *io, *mem1, *mem2;
|
||||||
|
@ -964,13 +931,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
last = &dev->resource[dev->resources];
|
last = &dev->resource[dev->resources];
|
||||||
for(resource = &dev->resource[0]; resource < last; resource++)
|
for(resource = &dev->resource[0]; resource < last; resource++)
|
||||||
{
|
{
|
||||||
#if 1
|
|
||||||
resource->flags |= IORESOURCE_ASSIGNED;
|
resource->flags |= IORESOURCE_ASSIGNED;
|
||||||
resource->flags &= ~IORESOURCE_STORED;
|
|
||||||
#endif
|
|
||||||
compute_allocate_resource(&dev->link[0], resource,
|
|
||||||
BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
|
|
||||||
|
|
||||||
resource->flags |= IORESOURCE_STORED;
|
resource->flags |= IORESOURCE_STORED;
|
||||||
report_resource_stored(dev, resource, "");
|
report_resource_stored(dev, resource, "");
|
||||||
|
|
||||||
|
@ -1125,7 +1086,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
static unsigned int amdk8_domain_scan_bus(device_t dev, unsigned int max)
|
||||||
{
|
{
|
||||||
unsigned reg;
|
unsigned reg;
|
||||||
int i;
|
int i;
|
||||||
|
@ -1160,11 +1121,11 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = amdk8_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = amdk8_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = amdk8_domain_scan_bus,
|
||||||
.ops_pci_bus = &pci_cf8_conf1,
|
.ops_pci_bus = &pci_cf8_conf1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -66,27 +66,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = PCI_DEVICE_ID_CYRIX_PCI_MASTER,
|
.device = PCI_DEVICE_ID_CYRIX_PCI_MASTER,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -187,12 +166,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -356,25 +356,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = PCI_DEVICE_ID_NS_GX2,
|
.device = PCI_DEVICE_ID_NS_GX2,
|
||||||
};
|
};
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -468,12 +449,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -74,8 +74,6 @@
|
||||||
#define IOD_BM(msr, pdid1, bizarro, ibase, imask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(ibase>>12), .lo=(ibase<<20)|imask}}
|
#define IOD_BM(msr, pdid1, bizarro, ibase, imask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(ibase>>12), .lo=(ibase<<20)|imask}}
|
||||||
#define IOD_SC(msr, pdid1, bizarro, en, wen, ren, ibase) {msr, {.hi=(pdid1<<29)|(bizarro<<28), .lo=(en<<24)|(wen<<21)|(ren<<20)|(ibase<<3)}}
|
#define IOD_SC(msr, pdid1, bizarro, en, wen, ren, ibase) {msr, {.hi=(pdid1<<29)|(bizarro<<28), .lo=(en<<24)|(wen<<21)|(ren<<20)|(ibase<<3)}}
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
extern void graphics_init(void);
|
extern void graphics_init(void);
|
||||||
extern void cpubug(void);
|
extern void cpubug(void);
|
||||||
extern void chipsetinit(void);
|
extern void chipsetinit(void);
|
||||||
|
@ -382,24 +380,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = PCI_DEVICE_ID_AMD_LXBRIDGE,
|
.device = PCI_DEVICE_ID_AMD_LXBRIDGE,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
printk_spew(">> Entering northbridge.c: %s\n", __func__);
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -470,14 +450,6 @@ static void pci_domain_enable(device_t dev)
|
||||||
pci_set_method(dev);
|
pci_set_method(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
printk_spew(">> Entering northbridge.c: %s\n", __func__);
|
|
||||||
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -9,23 +9,6 @@
|
||||||
#include <cpu/cpu.h>
|
#include <cpu/cpu.h>
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->base = 0x80000000ULL;
|
|
||||||
resource->limit = 0xfeffffffULL; /* We can put pci resources in the system controll area */
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -53,13 +36,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -9,23 +9,6 @@
|
||||||
#include <cpu/cpu.h>
|
#include <cpu/cpu.h>
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->base = 0x80000000ULL;
|
|
||||||
resource->limit = 0xfeffffffULL; /* We can put pci resources in the system controll area */
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -53,13 +36,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -9,23 +9,6 @@
|
||||||
#include <bitops.h>
|
#include <bitops.h>
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
unsigned reg;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->base = 0x400; //yhlu
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -155,12 +138,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -28,30 +28,6 @@ static void ram_resource(device_t dev, unsigned long index,
|
||||||
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffffffUL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
||||||
{
|
{
|
||||||
struct resource **best_p = gp;
|
struct resource **best_p = gp;
|
||||||
|
@ -90,7 +66,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
|
|
||||||
#if 1
|
#if 1
|
||||||
printk_debug("PCI mem marker = %x\n", pci_tolm);
|
printk_debug("PCI mem marker = %x\n", pci_tolm);
|
||||||
#endif
|
#endif
|
||||||
/* FIXME Me temporary hack */
|
/* FIXME Me temporary hack */
|
||||||
if(pci_tolm > 0xe0000000)
|
if(pci_tolm > 0xe0000000)
|
||||||
pci_tolm = 0xe0000000;
|
pci_tolm = 0xe0000000;
|
||||||
|
@ -122,7 +98,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
remapbasek = 0x3ff << 16;
|
remapbasek = 0x3ff << 16;
|
||||||
remaplimitk = 0 << 16;
|
remaplimitk = 0 << 16;
|
||||||
remapoffsetk = 0 << 16;
|
remapoffsetk = 0 << 16;
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
/* The PCI memory hole overlaps memory
|
/* The PCI memory hole overlaps memory
|
||||||
* setup the remap window.
|
* setup the remap window.
|
||||||
|
@ -165,7 +141,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024);
|
ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024);
|
||||||
}
|
}
|
||||||
if (remaplimitk >= remapbasek) {
|
if (remaplimitk >= remapbasek) {
|
||||||
ram_resource(dev, 6, remapbasek,
|
ram_resource(dev, 6, remapbasek,
|
||||||
(remaplimitk + 64*1024) - remapbasek);
|
(remaplimitk + 64*1024) - remapbasek);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -178,13 +154,10 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
static u32 e7520_domain_scan_bus(device_t dev, u32 max)
|
||||||
{
|
{
|
||||||
max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
|
max_bus = pci_domain_scan_bus(dev, max);
|
||||||
if (max > max_bus) {
|
return max_bus;
|
||||||
max_bus = max;
|
|
||||||
}
|
|
||||||
return max;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
|
@ -192,7 +165,7 @@ static struct device_operations pci_domain_ops = {
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = e7520_domain_scan_bus,
|
||||||
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
|
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -28,30 +28,6 @@ static void ram_resource(device_t dev, unsigned long index,
|
||||||
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffffffUL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
||||||
{
|
{
|
||||||
struct resource **best_p = gp;
|
struct resource **best_p = gp;
|
||||||
|
@ -90,7 +66,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
|
|
||||||
#if 1
|
#if 1
|
||||||
printk_debug("PCI mem marker = %x\n", pci_tolm);
|
printk_debug("PCI mem marker = %x\n", pci_tolm);
|
||||||
#endif
|
#endif
|
||||||
/* FIXME Me temporary hack */
|
/* FIXME Me temporary hack */
|
||||||
if(pci_tolm > 0xe0000000)
|
if(pci_tolm > 0xe0000000)
|
||||||
pci_tolm = 0xe0000000;
|
pci_tolm = 0xe0000000;
|
||||||
|
@ -122,7 +98,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
remapbasek = 0x3ff << 16;
|
remapbasek = 0x3ff << 16;
|
||||||
remaplimitk = 0 << 16;
|
remaplimitk = 0 << 16;
|
||||||
remapoffsetk = 0 << 16;
|
remapoffsetk = 0 << 16;
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
/* The PCI memory hole overlaps memory
|
/* The PCI memory hole overlaps memory
|
||||||
* setup the remap window.
|
* setup the remap window.
|
||||||
|
@ -160,12 +136,12 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
|
|
||||||
/* Report the memory regions */
|
/* Report the memory regions */
|
||||||
ram_resource(dev, 3, 0, 640);
|
ram_resource(dev, 3, 0, 640);
|
||||||
ram_resource(dev, 4, 768, tolmk - 768);
|
ram_resource(dev, 4, 768, (tolmk - 768));
|
||||||
if (tomk > 4*1024*1024) {
|
if (tomk > 4*1024*1024) {
|
||||||
ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024);
|
ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024);
|
||||||
}
|
}
|
||||||
if (remaplimitk >= remapbasek) {
|
if (remaplimitk >= remapbasek) {
|
||||||
ram_resource(dev, 6, remapbasek,
|
ram_resource(dev, 6, remapbasek,
|
||||||
(remaplimitk + 64*1024) - remapbasek);
|
(remaplimitk + 64*1024) - remapbasek);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -178,13 +154,10 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
static u32 e7525_domain_scan_bus(device_t dev, u32 max)
|
||||||
{
|
{
|
||||||
max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
|
max_bus = pci_domain_scan_bus(dev, max);
|
||||||
if (max > max_bus) {
|
return max_bus;
|
||||||
max_bus = max;
|
|
||||||
}
|
|
||||||
return max;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
|
@ -192,7 +165,7 @@ static struct device_operations pci_domain_ops = {
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = e7525_domain_scan_bus,
|
||||||
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
|
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -49,30 +49,6 @@ static void ram_resource(device_t dev, u32 index,
|
||||||
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffffffUL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
||||||
{
|
{
|
||||||
struct resource **best_p = gp;
|
struct resource **best_p = gp;
|
||||||
|
@ -199,13 +175,10 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static u32 pci_domain_scan_bus(device_t dev, u32 max)
|
static u32 i3100_domain_scan_bus(device_t dev, u32 max)
|
||||||
{
|
{
|
||||||
max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
|
max_bus = pci_domain_scan_bus(dev, max);
|
||||||
if (max > max_bus) {
|
return max_bus;
|
||||||
max_bus = max;
|
|
||||||
}
|
|
||||||
return max;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
|
@ -213,7 +186,7 @@ static struct device_operations pci_domain_ops = {
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = i3100_domain_scan_bus,
|
||||||
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
|
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -33,24 +33,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = 0x7190,
|
.device = 0x7190,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -95,7 +77,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
|
||||||
extern uint64_t high_tables_base, high_tables_size;
|
extern uint64_t high_tables_base, high_tables_size;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static void pci_domain_set_resources(device_t dev)
|
static void i440bx_domain_set_resources(device_t dev)
|
||||||
{
|
{
|
||||||
device_t mc_dev;
|
device_t mc_dev;
|
||||||
uint32_t pci_tolm;
|
uint32_t pci_tolm;
|
||||||
|
@ -140,15 +122,9 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = i440bx_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = pci_domain_scan_bus,
|
||||||
|
|
|
@ -52,27 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = 0x7120,
|
.device = 0x7120,
|
||||||
};
|
};
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
unsigned reg;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->base = 0x400;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -181,12 +160,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -51,25 +51,6 @@ static struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = 0x3575,
|
.device = 0x3575,
|
||||||
};
|
};
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide I/O space constraints. */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints. */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -158,12 +139,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -31,24 +31,6 @@
|
||||||
#include <cpu/x86/cache.h>
|
#include <cpu/x86/cache.h>
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
unsigned reg;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -156,12 +138,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -10,23 +10,6 @@
|
||||||
#include <bitops.h>
|
#include <bitops.h>
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -123,12 +106,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -43,31 +43,6 @@ static void ram_resource(device_t dev, unsigned long index, unsigned long basek,
|
||||||
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->base = 0;
|
|
||||||
resource->size = 0;
|
|
||||||
resource->align = 0;
|
|
||||||
resource->gran = 0;
|
|
||||||
resource->limit = 0xffffffffUL;
|
|
||||||
resource->flags =
|
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
||||||
{
|
{
|
||||||
struct resource **best_p = gp;
|
struct resource **best_p = gp;
|
||||||
|
@ -184,15 +159,10 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
|
|
||||||
/* TODO We could determine how many PCIe busses we need in
|
/* TODO We could determine how many PCIe busses we need in
|
||||||
* the bar. For now that number is hardcoded to a max of 64.
|
* the bar. For now that number is hardcoded to a max of 64.
|
||||||
|
* See e7525/northbridge.c for an example.
|
||||||
*/
|
*/
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -16,7 +16,7 @@
|
||||||
* be large enough to hold all expected resources for all PCI
|
* be large enough to hold all expected resources for all PCI
|
||||||
* devices.
|
* devices.
|
||||||
*/
|
*/
|
||||||
static void pci_domain_read_resources(device_t dev)
|
static void mpc107_domain_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
|
|
||||||
|
@ -101,15 +101,8 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = mpc107_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
|
|
|
@ -101,11 +101,11 @@ static const struct pci_driver memctrl_driver __pci_driver = {
|
||||||
.device = PCI_DEVICE_ID_VIA_CN400_MEMCTRL,
|
.device = PCI_DEVICE_ID_VIA_CN400_MEMCTRL,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
static void cn400_domain_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
|
|
||||||
printk_spew("Entering cn400 pci_domain_read_resources.\n");
|
printk_spew("Entering %s.\n", __func__);
|
||||||
|
|
||||||
/* Initialize the system wide I/O space constraints. */
|
/* Initialize the system wide I/O space constraints. */
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
|
@ -119,7 +119,7 @@ static void pci_domain_read_resources(device_t dev)
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
IORESOURCE_ASSIGNED;
|
IORESOURCE_ASSIGNED;
|
||||||
|
|
||||||
printk_spew("Leaving cn400 pci_domain_read_resources.\n");
|
printk_spew("Leaving %s.\n", __func__);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
|
@ -173,14 +173,14 @@ static u32 find_pci_tolm(struct bus *bus)
|
||||||
extern uint64_t high_tables_base, high_tables_size;
|
extern uint64_t high_tables_base, high_tables_size;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static void pci_domain_set_resources(device_t dev)
|
static void cn400_domain_set_resources(device_t dev)
|
||||||
{
|
{
|
||||||
/* The order is important to find the correct RAM size. */
|
/* The order is important to find the correct RAM size. */
|
||||||
static const u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 };
|
static const u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 };
|
||||||
device_t mc_dev;
|
device_t mc_dev;
|
||||||
u32 pci_tolm;
|
u32 pci_tolm;
|
||||||
|
|
||||||
printk_spew("Entering cn400 pci_domain_set_resources.\n");
|
printk_spew("Entering %s.\n", __func__);
|
||||||
|
|
||||||
pci_tolm = find_pci_tolm(&dev->link[0]);
|
pci_tolm = find_pci_tolm(&dev->link[0]);
|
||||||
mc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
|
mc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
|
||||||
|
@ -226,23 +226,23 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
}
|
}
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
|
|
||||||
printk_spew("Leaving cn400 pci_domain_set_resources.\n");
|
printk_spew("Leaving %s.\n", __func__);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
static unsigned int cn400_domain_scan_bus(device_t dev, unsigned int max)
|
||||||
{
|
{
|
||||||
printk_debug("Entering cn400 pci_domain_scan_bus.\n");
|
printk_debug("Entering %s.\n", __func__);
|
||||||
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
||||||
return max;
|
return max;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct device_operations pci_domain_ops = {
|
static const struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = cn400_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = cn400_domain_set_resources,
|
||||||
.enable_resources = enable_childrens_resources,
|
.enable_resources = enable_childrens_resources,
|
||||||
.init = 0,
|
.init = 0,
|
||||||
.scan_bus = pci_domain_scan_bus,
|
.scan_bus = cn400_domain_scan_bus,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void cpu_bus_init(device_t dev)
|
static void cpu_bus_init(device_t dev)
|
||||||
|
|
|
@ -97,27 +97,6 @@ static const struct pci_driver memctrl_driver __pci_driver = {
|
||||||
.device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL,
|
.device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
printk_spew("Entering cn700 pci_domain_read_resources.\n");
|
|
||||||
|
|
||||||
/* Initialize the system wide I/O space constraints. */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
|
||||||
IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints. */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
|
||||||
IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
printk_spew("Leaving cn700 pci_domain_read_resources.\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -223,14 +202,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
printk_debug("Entering cn700 pci_domain_scan_bus.\n");
|
|
||||||
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct device_operations pci_domain_ops = {
|
static const struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -329,7 +329,7 @@ static void cx700_set_lpc_registers(struct device *dev)
|
||||||
|
|
||||||
void cx700_read_resources(device_t dev)
|
void cx700_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *res;
|
||||||
|
|
||||||
/* Make sure we call our childrens set/enable functions - these
|
/* Make sure we call our childrens set/enable functions - these
|
||||||
* are not called unless this device has a resource to set.
|
* are not called unless this device has a resource to set.
|
||||||
|
@ -337,11 +337,16 @@ void cx700_read_resources(device_t dev)
|
||||||
|
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
resource = new_resource(dev, 1);
|
res = new_resource(dev, 1);
|
||||||
resource->flags |=
|
res->base = 0x0UL;
|
||||||
IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO | IORESOURCE_STORED;
|
res->size = 0x400UL;
|
||||||
resource->size = 2;
|
res->limit = 0xffffUL;
|
||||||
resource->base = 0x2e;
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void cx700_set_resources(device_t dev)
|
void cx700_set_resources(device_t dev)
|
||||||
|
|
|
@ -32,21 +32,6 @@
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
#include "northbridge.h"
|
#include "northbridge.h"
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -146,12 +131,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -45,23 +45,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
||||||
.device = 0x0601, /* 0x8601 is the AGP bridge? */
|
.device = 0x0601, /* 0x8601 is the AGP bridge? */
|
||||||
};
|
};
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -160,12 +143,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -190,30 +190,6 @@ static const struct pci_driver vga_driver __pci_driver = {
|
||||||
.device = 0x3122,
|
.device = 0x3122,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
|
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
printk_spew("Entering vt8623 pci_domain_read_resources.\n");
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
|
||||||
IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
|
||||||
IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
printk_spew("Leaving vt8623 pci_domain_read_resources.\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -313,14 +289,6 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
printk_spew("Entering vt8623 pci_domain_scan_bus.\n");
|
|
||||||
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct device_operations pci_domain_ops = {
|
static struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -69,27 +69,6 @@ static const struct pci_driver memctrl_driver __pci_driver = {
|
||||||
.device = PCI_DEVICE_ID_VIA_VX855_MEMCTRL,
|
.device = PCI_DEVICE_ID_VIA_VX855_MEMCTRL,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void pci_domain_read_resources(device_t dev)
|
|
||||||
{
|
|
||||||
struct resource *resource;
|
|
||||||
|
|
||||||
printk_spew("Entering vx800 pci_domain_read_resources.\n");
|
|
||||||
|
|
||||||
/* Initialize the system wide io space constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
resource->limit = 0xffffUL;
|
|
||||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
|
||||||
IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
/* Initialize the system wide memory resources constraints */
|
|
||||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
resource->limit = 0xffffffffULL;
|
|
||||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
|
||||||
IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
printk_spew("Leaving vx800 pci_domain_read_resources.\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ram_resource(device_t dev, unsigned long index,
|
static void ram_resource(device_t dev, unsigned long index,
|
||||||
unsigned long basek, unsigned long sizek)
|
unsigned long basek, unsigned long sizek)
|
||||||
{
|
{
|
||||||
|
@ -195,14 +174,6 @@ if register with invalid value we set frame buffer size to 32M for default, but
|
||||||
assign_resources(&dev->link[0]);
|
assign_resources(&dev->link[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
|
||||||
{
|
|
||||||
printk_debug("Entering vx800 pci_domain_scan_bus.\n");
|
|
||||||
|
|
||||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
|
||||||
return max;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct device_operations pci_domain_ops = {
|
static const struct device_operations pci_domain_ops = {
|
||||||
.read_resources = pci_domain_read_resources,
|
.read_resources = pci_domain_read_resources,
|
||||||
.set_resources = pci_domain_set_resources,
|
.set_resources = pci_domain_set_resources,
|
||||||
|
|
|
@ -162,15 +162,26 @@ static void amd8111_lpc_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal PCI resources of this device. */
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void amd8111_lpc_enable_resources(device_t dev)
|
static void amd8111_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -364,9 +364,6 @@ static void bridge_set_resources(struct device *dev)
|
||||||
/* set the memory range */
|
/* set the memory range */
|
||||||
dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
|
dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
|
||||||
res->flags |= IORESOURCE_STORED;
|
res->flags |= IORESOURCE_STORED;
|
||||||
compute_allocate_resource(&dev->link[0], res,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM);
|
|
||||||
base = res->base;
|
base = res->base;
|
||||||
end = resource_end(res);
|
end = resource_end(res);
|
||||||
pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16);
|
pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16);
|
||||||
|
|
|
@ -350,9 +350,6 @@ static void bridge_set_resources(struct device *dev)
|
||||||
/* set the memory range */
|
/* set the memory range */
|
||||||
dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
|
dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
|
||||||
res->flags |= IORESOURCE_STORED;
|
res->flags |= IORESOURCE_STORED;
|
||||||
compute_allocate_resource(&dev->link[0], res,
|
|
||||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
|
||||||
IORESOURCE_MEM);
|
|
||||||
base = res->base;
|
base = res->base;
|
||||||
end = resource_end(res);
|
end = resource_end(res);
|
||||||
pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16);
|
pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16);
|
||||||
|
|
|
@ -25,6 +25,24 @@
|
||||||
#include <device/pci_ids.h>
|
#include <device/pci_ids.h>
|
||||||
#include "cs5530.h"
|
#include "cs5530.h"
|
||||||
|
|
||||||
|
static void cs5530_read_resources(device_t dev)
|
||||||
|
{
|
||||||
|
struct resource* res;
|
||||||
|
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x400UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
}
|
||||||
|
|
||||||
static void isa_init(struct device *dev)
|
static void isa_init(struct device *dev)
|
||||||
{
|
{
|
||||||
uint8_t reg8;
|
uint8_t reg8;
|
||||||
|
@ -45,7 +63,7 @@ static void cs5530_pci_dev_enable_resources(device_t dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations isa_ops = {
|
static struct device_operations isa_ops = {
|
||||||
.read_resources = pci_dev_read_resources,
|
.read_resources = cs5530_read_resources,
|
||||||
.set_resources = pci_dev_set_resources,
|
.set_resources = pci_dev_set_resources,
|
||||||
.enable_resources = cs5530_pci_dev_enable_resources,
|
.enable_resources = cs5530_pci_dev_enable_resources,
|
||||||
.init = isa_init,
|
.init = isa_init,
|
||||||
|
|
|
@ -69,6 +69,24 @@ static void southbridge_enable(struct device *dev)
|
||||||
printk_spew("%s: dev is %p\n", __func__, dev);
|
printk_spew("%s: dev is %p\n", __func__, dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void cs5535_read_resources(device_t dev)
|
||||||
|
{
|
||||||
|
struct resource* res;
|
||||||
|
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x400UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
}
|
||||||
|
|
||||||
static void cs5535_pci_dev_enable_resources(device_t dev)
|
static void cs5535_pci_dev_enable_resources(device_t dev)
|
||||||
{
|
{
|
||||||
printk_spew("cs5535.c: %s()\n", __func__);
|
printk_spew("cs5535.c: %s()\n", __func__);
|
||||||
|
@ -77,7 +95,7 @@ static void cs5535_pci_dev_enable_resources(device_t dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations southbridge_ops = {
|
static struct device_operations southbridge_ops = {
|
||||||
.read_resources = pci_dev_read_resources,
|
.read_resources = cs5535_read_resources,
|
||||||
.set_resources = pci_dev_set_resources,
|
.set_resources = pci_dev_set_resources,
|
||||||
.enable_resources = cs5535_pci_dev_enable_resources,
|
.enable_resources = cs5535_pci_dev_enable_resources,
|
||||||
.init = southbridge_init,
|
.init = southbridge_init,
|
||||||
|
|
|
@ -607,6 +607,25 @@ static void southbridge_init(struct device *dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void cs5536_read_resources(device_t dev)
|
||||||
|
{
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x400UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
}
|
||||||
|
|
||||||
static void southbridge_enable(struct device *dev)
|
static void southbridge_enable(struct device *dev)
|
||||||
{
|
{
|
||||||
printk_err("cs5536: %s: dev is %p\n", __func__, dev);
|
printk_err("cs5536: %s: dev is %p\n", __func__, dev);
|
||||||
|
@ -621,7 +640,7 @@ static void cs5536_pci_dev_enable_resources(device_t dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations southbridge_ops = {
|
static struct device_operations southbridge_ops = {
|
||||||
.read_resources = pci_dev_read_resources,
|
.read_resources = cs5536_read_resources,
|
||||||
.set_resources = pci_dev_set_resources,
|
.set_resources = pci_dev_set_resources,
|
||||||
.enable_resources = cs5536_pci_dev_enable_resources,
|
.enable_resources = cs5536_pci_dev_enable_resources,
|
||||||
.init = southbridge_init,
|
.init = southbridge_init,
|
||||||
|
|
|
@ -70,14 +70,23 @@ static void sb600_lpc_read_resources(device_t dev)
|
||||||
|
|
||||||
pci_get_resource(dev, 0xA0); /* SPI ROM base address */
|
pci_get_resource(dev, 0xA0); /* SPI ROM base address */
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags =
|
res->base = 0;
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags =
|
res->base = 0xff800000;
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
compact_resources(dev);
|
compact_resources(dev);
|
||||||
}
|
}
|
||||||
|
@ -111,7 +120,7 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
|
||||||
for (child = dev->link[link].children; child;
|
for (child = dev->link[link].children; child;
|
||||||
child = child->sibling) {
|
child = child->sibling) {
|
||||||
enable_resources(child);
|
enable_resources(child);
|
||||||
if (child->have_resources
|
if (child->enabled
|
||||||
&& (child->path.type == DEVICE_PATH_PNP)) {
|
&& (child->path.type == DEVICE_PATH_PNP)) {
|
||||||
for (i = 0; i < child->resources; i++) {
|
for (i = 0; i < child->resources; i++) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
|
@ -29,18 +29,27 @@ static void lpc_init(device_t dev)
|
||||||
static void bcm5785_lpc_read_resources(device_t dev)
|
static void bcm5785_lpc_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
unsigned long index;
|
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal pci resources of this device */
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
|
||||||
|
|
||||||
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -69,7 +78,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
|
||||||
device_t child;
|
device_t child;
|
||||||
for (child = dev->link[link].children; child; child = child->sibling) {
|
for (child = dev->link[link].children; child; child = child->sibling) {
|
||||||
enable_resources(child);
|
enable_resources(child);
|
||||||
if(child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
|
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
|
||||||
for(i=0;i<child->resources;i++) {
|
for(i=0;i<child->resources;i++) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
unsigned long base, end; // don't need long long
|
unsigned long base, end; // don't need long long
|
||||||
|
|
|
@ -51,7 +51,6 @@ static void bcm5785_sb_read_resources(device_t dev)
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal pci resources of this device */
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Get Resource for SMBUS */
|
/* Get Resource for SMBUS */
|
||||||
pci_get_resource(dev, 0x90);
|
pci_get_resource(dev, 0x90);
|
||||||
|
|
||||||
|
|
|
@ -361,12 +361,23 @@ static void esb6300_lpc_read_resources(device_t dev)
|
||||||
/* Add the GPIO BAR */
|
/* Add the GPIO BAR */
|
||||||
res = pci_get_resource(dev, GPIO_BAR);
|
res = pci_get_resource(dev, GPIO_BAR);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void esb6300_lpc_enable_resources(device_t dev)
|
static void esb6300_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -399,12 +399,23 @@ static void i3100_lpc_read_resources(device_t dev)
|
||||||
/* Add the GPIO BAR */
|
/* Add the GPIO BAR */
|
||||||
res = pci_get_resource(dev, GPIO_BAR);
|
res = pci_get_resource(dev, GPIO_BAR);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
/* Add resource for RCBA */
|
/* Add resource for RCBA */
|
||||||
res = new_resource(dev, RCBA);
|
res = new_resource(dev, RCBA);
|
||||||
|
|
|
@ -55,8 +55,31 @@ static void isa_init(struct device *dev)
|
||||||
isa_dma_init();
|
isa_dma_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct device_operations isa_ops = {
|
static void sb_read_resources(struct device *dev)
|
||||||
.read_resources = pci_dev_read_resources,
|
{
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x1000UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 2);
|
||||||
|
res->base = 0xff800000UL;
|
||||||
|
res->size = 0x00800000UL; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
}
|
||||||
|
|
||||||
|
const struct device_operations isa_ops = {
|
||||||
|
.read_resources = sb_read_resources,
|
||||||
.set_resources = pci_dev_set_resources,
|
.set_resources = pci_dev_set_resources,
|
||||||
.enable_resources = pci_dev_enable_resources,
|
.enable_resources = pci_dev_enable_resources,
|
||||||
.init = isa_init,
|
.init = isa_init,
|
||||||
|
|
|
@ -207,15 +207,26 @@ static void i82801ca_lpc_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal PCI resources of this device. */
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void i82801ca_lpc_enable_resources(device_t dev)
|
static void i82801ca_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -182,15 +182,26 @@ static void i82801dbm_lpc_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal PCI resources of this device. */
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void i82801dbm_lpc_enable_resources(device_t dev)
|
static void i82801dbm_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -334,7 +334,7 @@ static void i82801er_lpc_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal PCI resources of this device. */
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Add the ACPI BAR */
|
/* Add the ACPI BAR */
|
||||||
|
@ -343,12 +343,23 @@ static void i82801er_lpc_read_resources(device_t dev)
|
||||||
/* Add the GPIO BAR */
|
/* Add the GPIO BAR */
|
||||||
res = pci_get_resource(dev, GPIO_BAR);
|
res = pci_get_resource(dev, GPIO_BAR);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void i82801er_lpc_enable_resources(device_t dev)
|
static void i82801er_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -419,12 +419,21 @@ static void i82801gx_lpc_read_resources(device_t dev)
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O. */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags =
|
res->base = 0;
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags =
|
res->base = 0xff800000;
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void i82801gx_lpc_enable_resources(device_t dev)
|
static void i82801gx_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -340,12 +340,21 @@ static void i82801xx_lpc_read_resources(device_t dev)
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O. */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags =
|
res->base = 0;
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags =
|
res->base = 0xff800000;
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void i82801xx_lpc_enable_resources(device_t dev)
|
static void i82801xx_lpc_enable_resources(device_t dev)
|
||||||
|
|
|
@ -275,12 +275,21 @@ static void ck804_lpc_read_resources(device_t dev)
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O. */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags =
|
res->base = 0;
|
||||||
IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags =
|
res->base = 0xff800000;
|
||||||
IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -308,7 +317,7 @@ static void ck804_lpc_enable_childrens_resources(device_t dev)
|
||||||
device_t child;
|
device_t child;
|
||||||
for (child = dev->link[link].children; child; child = child->sibling) {
|
for (child = dev->link[link].children; child; child = child->sibling) {
|
||||||
enable_resources(child);
|
enable_resources(child);
|
||||||
if (child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
|
if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
|
||||||
for (i = 0; i < child->resources; i++) {
|
for (i = 0; i < child->resources; i++) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
unsigned long base, end; // don't need long long
|
unsigned long base, end; // don't need long long
|
||||||
|
|
|
@ -5,6 +5,7 @@
|
||||||
|
|
||||||
#include <console/console.h>
|
#include <console/console.h>
|
||||||
#include <device/device.h>
|
#include <device/device.h>
|
||||||
|
#include <device/resource.h>
|
||||||
#include <device/pci.h>
|
#include <device/pci.h>
|
||||||
#include <device/pci_ids.h>
|
#include <device/pci_ids.h>
|
||||||
#include <device/pci_ops.h>
|
#include <device/pci_ops.h>
|
||||||
|
@ -13,10 +14,8 @@
|
||||||
static void pci_init(struct device *dev)
|
static void pci_init(struct device *dev)
|
||||||
{
|
{
|
||||||
uint32_t dword;
|
uint32_t dword;
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
|
||||||
device_t pci_domain_dev;
|
device_t pci_domain_dev;
|
||||||
struct resource *mem1, *mem2;
|
struct resource *mem, *pref;
|
||||||
#endif
|
|
||||||
|
|
||||||
dword = pci_read_config32(dev, 0x04);
|
dword = pci_read_config32(dev, 0x04);
|
||||||
dword |= (1 << 8); /* System error enable */
|
dword |= (1 << 8); /* System error enable */
|
||||||
|
@ -36,7 +35,6 @@ static void pci_init(struct device *dev)
|
||||||
pci_write_config32(dev, 0x4c, dword);
|
pci_write_config32(dev, 0x4c, dword);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
|
||||||
pci_domain_dev = dev->bus->dev;
|
pci_domain_dev = dev->bus->dev;
|
||||||
while (pci_domain_dev) {
|
while (pci_domain_dev) {
|
||||||
if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN)
|
if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN)
|
||||||
|
@ -47,21 +45,19 @@ static void pci_init(struct device *dev)
|
||||||
if (!pci_domain_dev)
|
if (!pci_domain_dev)
|
||||||
return; /* Impossible */
|
return; /* Impossible */
|
||||||
|
|
||||||
mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit
|
pref = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(2,0));
|
||||||
mem2 = find_resource(pci_domain_dev, 2); // mem
|
mem = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(1,0));
|
||||||
if (mem1->base > mem2->base) {
|
|
||||||
dword = mem2->base & (0xffff0000UL);
|
if (!mem)
|
||||||
printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base);
|
return; /* Impossible */
|
||||||
|
|
||||||
|
if (!pref || pref->base > mem->base) {
|
||||||
|
dword = mem->base & (0xffff0000UL);
|
||||||
|
printk_debug("PCI DOMAIN mem base = 0x%010Lx\n", mem->base);
|
||||||
} else {
|
} else {
|
||||||
dword = mem1->base & (0xffff0000UL);
|
dword = pref->base & (0xffff0000UL);
|
||||||
printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n",
|
printk_debug("PCI DOMAIN pref base = 0x%010Lx\n", pref->base);
|
||||||
mem1->base);
|
|
||||||
}
|
}
|
||||||
#else
|
|
||||||
dword = dev_root.resource[1].base & (0xffff0000UL);
|
|
||||||
printk_debug("dev_root mem base = 0x%010Lx\n",
|
|
||||||
dev_root.resource[1].base);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
printk_debug("[0x50] <-- 0x%08x\n", dword);
|
printk_debug("[0x50] <-- 0x%08x\n", dword);
|
||||||
pci_write_config32(dev, 0x50, dword); /* TOM */
|
pci_write_config32(dev, 0x50, dword); /* TOM */
|
||||||
|
|
|
@ -248,16 +248,27 @@ static void mcp55_lpc_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal PCI resources of this device. */
|
||||||
pci_dev_read_resources(dev); // We got one for APIC, or one more for TRAP
|
/* We got one for APIC, or one more for TRAP. */
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -265,7 +276,7 @@ static void mcp55_lpc_read_resources(device_t dev)
|
||||||
*
|
*
|
||||||
* @param dev the device whos children's resources are to be enabled
|
* @param dev the device whos children's resources are to be enabled
|
||||||
*
|
*
|
||||||
* This function is call by the global enable_resources() indirectly via the
|
* This function is called by the global enable_resources() indirectly via the
|
||||||
* device_operation::enable_resources() method of devices.
|
* device_operation::enable_resources() method of devices.
|
||||||
*
|
*
|
||||||
* Indirect mutual recursion:
|
* Indirect mutual recursion:
|
||||||
|
@ -286,7 +297,7 @@ static void mcp55_lpc_enable_childrens_resources(device_t dev)
|
||||||
device_t child;
|
device_t child;
|
||||||
for (child = dev->link[link].children; child; child = child->sibling) {
|
for (child = dev->link[link].children; child; child = child->sibling) {
|
||||||
enable_resources(child);
|
enable_resources(child);
|
||||||
if(child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
|
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
|
||||||
for(i=0;i<child->resources;i++) {
|
for(i=0;i<child->resources;i++) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
unsigned long base, end; // don't need long long
|
unsigned long base, end; // don't need long long
|
||||||
|
|
|
@ -23,6 +23,7 @@
|
||||||
|
|
||||||
#include <console/console.h>
|
#include <console/console.h>
|
||||||
#include <device/device.h>
|
#include <device/device.h>
|
||||||
|
#include <device/resource.h>
|
||||||
#include <device/pci.h>
|
#include <device/pci.h>
|
||||||
#include <device/pci_ids.h>
|
#include <device/pci_ids.h>
|
||||||
#include <device/pci_ops.h>
|
#include <device/pci_ops.h>
|
||||||
|
@ -33,10 +34,8 @@ static void pci_init(struct device *dev)
|
||||||
|
|
||||||
uint32_t dword;
|
uint32_t dword;
|
||||||
uint16_t word;
|
uint16_t word;
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
|
||||||
device_t pci_domain_dev;
|
device_t pci_domain_dev;
|
||||||
struct resource *mem1, *mem2;
|
struct resource *mem, *pref;
|
||||||
#endif
|
|
||||||
|
|
||||||
/* System error enable */
|
/* System error enable */
|
||||||
dword = pci_read_config32(dev, 0x04);
|
dword = pci_read_config32(dev, 0x04);
|
||||||
|
@ -58,30 +57,32 @@ static void pci_init(struct device *dev)
|
||||||
pci_write_config32(dev, 0x4c, dword);
|
pci_write_config32(dev, 0x4c, dword);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if CONFIG_PCI_64BIT_PREF_MEM == 1
|
|
||||||
pci_domain_dev = dev->bus->dev;
|
pci_domain_dev = dev->bus->dev;
|
||||||
while(pci_domain_dev) {
|
while (pci_domain_dev) {
|
||||||
if(pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) break;
|
if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN)
|
||||||
|
break;
|
||||||
pci_domain_dev = pci_domain_dev->bus->dev;
|
pci_domain_dev = pci_domain_dev->bus->dev;
|
||||||
}
|
}
|
||||||
|
|
||||||
if(!pci_domain_dev) return; // impossiable
|
if (!pci_domain_dev)
|
||||||
mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit
|
return; /* Impossible */
|
||||||
mem2 = find_resource(pci_domain_dev, 2); // mem
|
|
||||||
if(mem1->base > mem2->base) {
|
|
||||||
dword = mem2->base & (0xffff0000UL);
|
|
||||||
printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base);
|
|
||||||
} else {
|
|
||||||
dword = mem1->base & (0xffff0000UL);
|
|
||||||
printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n", mem1->base);
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
dword = dev_root.resource[1].base & (0xffff0000UL);
|
|
||||||
printk_debug("dev_root mem base = 0x%010Lx\n", dev_root.resource[1].base);
|
|
||||||
#endif
|
|
||||||
printk_debug("[0x50] <-- 0x%08x\n", dword);
|
|
||||||
pci_write_config32(dev, 0x50, dword); //TOM
|
|
||||||
|
|
||||||
|
pref = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(2,0));
|
||||||
|
mem = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(1,0));
|
||||||
|
|
||||||
|
if (!mem)
|
||||||
|
return; /* Impossible */
|
||||||
|
|
||||||
|
if (!pref || pref->base > mem->base) {
|
||||||
|
dword = mem->base & (0xffff0000UL);
|
||||||
|
printk_debug("PCI DOMAIN mem base = 0x%010Lx\n", mem->base);
|
||||||
|
} else {
|
||||||
|
dword = pref->base & (0xffff0000UL);
|
||||||
|
printk_debug("PCI DOMAIN pref base = 0x%010Lx\n", pref->base);
|
||||||
|
}
|
||||||
|
|
||||||
|
printk_debug("[0x50] <-- 0x%08x\n", dword);
|
||||||
|
pci_write_config32(dev, 0x50, dword); /* TOM */
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct pci_operations lops_pci = {
|
static struct pci_operations lops_pci = {
|
||||||
|
|
|
@ -172,7 +172,6 @@ void rl5c476_set_resources(device_t dev)
|
||||||
resource = find_resource(dev,1);
|
resource = find_resource(dev,1);
|
||||||
if( !(resource->flags & IORESOURCE_STORED) ){
|
if( !(resource->flags & IORESOURCE_STORED) ){
|
||||||
resource->flags |= IORESOURCE_STORED ;
|
resource->flags |= IORESOURCE_STORED ;
|
||||||
compute_allocate_resource(&dev->link[0],resource,resource->flags,resource->flags);
|
|
||||||
printk_debug("%s 1 ==> %x\n",dev_path(dev),resource->base);
|
printk_debug("%s 1 ==> %x\n",dev_path(dev),resource->base);
|
||||||
cf_base = resource->base;
|
cf_base = resource->base;
|
||||||
}
|
}
|
||||||
|
|
|
@ -239,13 +239,23 @@ static void sis966_lpc_read_resources(device_t dev)
|
||||||
/* Get the normal pci resources of this device */
|
/* Get the normal pci resources of this device */
|
||||||
pci_dev_read_resources(dev); // We got one for APIC, or one more for TRAP
|
pci_dev_read_resources(dev); // We got one for APIC, or one more for TRAP
|
||||||
|
|
||||||
/* Add an extra subtractive resource for both memory and I/O */
|
/* Add an extra subtractive resource for both memory and I/O. */
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||||
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0;
|
||||||
|
res->size = 0x1000;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||||
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
res->base = 0xff800000;
|
||||||
|
res->size = 0x00800000; /* 8 MB for flash */
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
|
||||||
|
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -274,7 +284,7 @@ static void sis966_lpc_enable_childrens_resources(device_t dev)
|
||||||
device_t child;
|
device_t child;
|
||||||
for (child = dev->link[link].children; child; child = child->sibling) {
|
for (child = dev->link[link].children; child; child = child->sibling) {
|
||||||
enable_resources(child);
|
enable_resources(child);
|
||||||
if(child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
|
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
|
||||||
for(i=0;i<child->resources;i++) {
|
for(i=0;i<child->resources;i++) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
unsigned long base, end; // don't need long long
|
unsigned long base, end; // don't need long long
|
||||||
|
|
|
@ -131,6 +131,24 @@ static void vt8231_init(struct device *dev)
|
||||||
rtc_init(0);
|
rtc_init(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void vt8231_read_resources(device_t dev)
|
||||||
|
{
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x400UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
}
|
||||||
|
|
||||||
static void southbridge_init(struct device *dev)
|
static void southbridge_init(struct device *dev)
|
||||||
{
|
{
|
||||||
vt8231_init(dev);
|
vt8231_init(dev);
|
||||||
|
@ -138,7 +156,7 @@ static void southbridge_init(struct device *dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct device_operations vt8231_lpc_ops = {
|
static struct device_operations vt8231_lpc_ops = {
|
||||||
.read_resources = pci_dev_read_resources,
|
.read_resources = vt8231_read_resources,
|
||||||
.set_resources = pci_dev_set_resources,
|
.set_resources = pci_dev_set_resources,
|
||||||
.enable_resources = pci_dev_enable_resources,
|
.enable_resources = pci_dev_enable_resources,
|
||||||
.init = &southbridge_init,
|
.init = &southbridge_init,
|
||||||
|
|
|
@ -219,15 +219,22 @@ static void vt8235_init(struct device *dev)
|
||||||
device has a resource to set - so set a dummy one */
|
device has a resource to set - so set a dummy one */
|
||||||
void vt8235_read_resources(device_t dev)
|
void vt8235_read_resources(device_t dev)
|
||||||
{
|
{
|
||||||
|
struct resource *res;
|
||||||
|
|
||||||
struct resource *resource;
|
|
||||||
pci_dev_read_resources(dev);
|
pci_dev_read_resources(dev);
|
||||||
resource = new_resource(dev, 1);
|
|
||||||
resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO | IORESOURCE_STORED;
|
|
||||||
resource->size = 2;
|
|
||||||
resource->base = 0x2e;
|
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x400UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void vt8235_set_resources(device_t dev)
|
void vt8235_set_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
|
|
|
@ -188,8 +188,26 @@ static void w83c553_enable_resources(device_t dev)
|
||||||
enable_childrens_resources(dev);
|
enable_childrens_resources(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void w83c553_read_resources(device_t dev)
|
||||||
|
{
|
||||||
|
struct resource* res;
|
||||||
|
|
||||||
|
pci_dev_read_resources(dev);
|
||||||
|
|
||||||
|
res = new_resource(dev, 1);
|
||||||
|
res->base = 0x0UL;
|
||||||
|
res->size = 0x400UL;
|
||||||
|
res->limit = 0xffffUL;
|
||||||
|
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
|
||||||
|
res = new_resource(dev, 3); /* IOAPIC */
|
||||||
|
res->base = 0xfec00000;
|
||||||
|
res->size = 0x00001000;
|
||||||
|
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||||
|
}
|
||||||
|
|
||||||
static struct device_operations w83c553_ops = {
|
static struct device_operations w83c553_ops = {
|
||||||
.read_resources = pci_dev_read_resources,
|
.read_resources = w83c553_read_resources,
|
||||||
.set_resources = pci_dev_set_resources,
|
.set_resources = pci_dev_set_resources,
|
||||||
.enable_resources = w83c553_enable_resources,
|
.enable_resources = w83c553_enable_resources,
|
||||||
.init = w83c553_init,
|
.init = w83c553_init,
|
||||||
|
|
Loading…
Reference in New Issue