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As Myles suggested a while back: Switch long time #warnings to be comments 

only. Keeping them as #warnings will not likely that they're fixed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-04-20 11:03:41 +00:00 committed by Stefan Reinauer
parent ea6772d306
commit 29ceae2c37
9 changed files with 21 additions and 20 deletions
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4
src/mainboard/arima/hdama/mptable.c
View File

@ -295,14 +295,14 @@ static void *smp_write_config_table(void *v)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, apicid_8111, 0x11);
/* PCI Slot 5 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, apicid_8111, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, apicid_8111, 0x12);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, apicid_8111, 0x13);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, apicid_8111, 0x10);
/* PCI Slot 6 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, apicid_8111, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, apicid_8111, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, apicid_8111, 0x12);

4
src/mainboard/iwill/dk8s2/mptable.c
View File

@ -186,7 +186,7 @@ static void *smp_write_config_table(void *v)
bus_8131_1, (2<<2)|3, 0x02, 0x11);
/* PCI Slot 5 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (5<<2)|0, 0x02, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
@ -197,7 +197,7 @@ static void *smp_write_config_table(void *v)
bus_8111_1, (5<<2)|3, 0x02, 0x10);
/* PCI Slot 6 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|0, 0x02, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,

4
src/mainboard/iwill/dk8x/mptable.c
View File

@ -186,7 +186,7 @@ static void *smp_write_config_table(void *v)
bus_8131_1, (2<<2)|3, 0x02, 0x11);
/* PCI Slot 5 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (5<<2)|0, 0x02, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
@ -197,7 +197,7 @@ static void *smp_write_config_table(void *v)
bus_8111_1, (5<<2)|3, 0x02, 0x10);
/* PCI Slot 6 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|0, 0x02, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,

4
src/mainboard/newisys/khepri/mptable.c
View File

@ -187,7 +187,7 @@ static void *smp_write_config_table(void *v)
bus_8131_1, (2<<2)|3, 0x02, 0x11);
/* PCI Slot 5 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (5<<2)|0, 0x02, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
@ -198,7 +198,7 @@ static void *smp_write_config_table(void *v)
bus_8111_1, (5<<2)|3, 0x02, 0x10);
/* PCI Slot 6 */
#warning "FIXME get the irqs right, it's just hacked to work for now"
// FIXME get the irqs right, it's just hacked to work for now
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|0, 0x02, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,

6
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -960,12 +960,14 @@ static void pci_domain_set_resources(device_t dev)
pci_tolm = find_pci_tolm(&dev->link[link], pci_tolm);
}
#warning "FIXME handle interleaved nodes"
// FIXME handle interleaved nodes. If you fix this here, please fix
// amdk8, too.
mmio_basek = pci_tolm >> 10;
/* Round mmio_basek to something the processor can support */
mmio_basek &= ~((1 << 6) -1);
#warning "FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M MMIO hole"
// FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M
// MMIO hole. If you fix this here, please fix amdk8, too.
/* Round the mmio hold to 64M */
mmio_basek &= ~((64*1024) - 1);

9
src/northbridge/amd/amdk8/northbridge.c
View File

@ -915,19 +915,18 @@ static void amdk8_domain_set_resources(device_t dev)
}
#endif
pci_tolm = find_pci_tolm(&dev->link[0]);
#warning "FIXME handle interleaved nodes"
// FIXME handle interleaved nodes. If you fix this here, please fix
// amdfam10, too.
mmio_basek = pci_tolm >> 10;
/* Round mmio_basek to something the processor can support */
mmio_basek &= ~((1 << 6) -1);
#if 1
#warning "FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M MMIO hole"
// FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M
// MMIO hole. If you fix this here, please fix amdfam10, too.
/* Round the mmio hole to 64M */
mmio_basek &= ~((64*1024) - 1);
#endif
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
/* if the hw mem hole is already set in raminit stage, here we will compare mmio_basek and hole_basek

6
src/northbridge/amd/amdk8/raminit_f.c
View File

@ -1964,9 +1964,9 @@ static int get_dimm_Trc_clocks(u32 spd_device, const struct mem_param *param)
printk_raminit("update_dimm_Trc: clocks = %i\n", clocks);
if (clocks < DTL_TRC_MIN) {
#warning We should die here or at least disable this bank.
printk(BIOS_NOTICE, "update_dimm_Trc: can't refresh fast enough, "
"want %i clocks, can %i clocks\n", clocks, DTL_TRC_MIN);
// We might want to die here instead or (at least|better) disable this bank.
printk(BIOS_NOTICE, "update_dimm_Trc: Can't refresh fast enough, "
"want %i clocks, minimum is %i clocks.\n", clocks, DTL_TRC_MIN);
clocks = DTL_TRC_MIN;
}
return clocks;

2
src/southbridge/amd/sb600/sb600_early_setup.c
View File

@ -88,7 +88,7 @@ static void sb600_lpc_init(void)
dev = pci_locate_device(PCI_ID(0x1002, 0x438d), 0); /* LPC Controller */
/* Decode port 0x3f8-0x3ff (Serial 0) */
#warning Serial port decode on LPC is hardcoded to 0x3f8
// XXX Serial port decode on LPC is hardcoded to 0x3f8
reg8 = pci_read_config8(dev, 0x44);
reg8 |= 1 << 6;
pci_write_config8(dev, 0x44, reg8);

2
src/southbridge/amd/sb700/sb700_early_setup.c
View File

@ -119,7 +119,7 @@ static void sb700_lpc_init(void)
dev = pci_locate_device(PCI_ID(0x1002, 0x439d), 0); /* LPC Controller */
/* Decode port 0x3f8-0x3ff (Serial 0) */
#warning Serial port decode on LPC is hardcoded to 0x3f8
// XXX Serial port decode on LPC is hardcoded to 0x3f8
reg8 = pci_read_config8(dev, 0x44);
reg8 |= 1 << 6;
pci_write_config8(dev, 0x44, reg8);