soc/mediatek/mt8188: Enable mmu operation for L2C SRAM and DMA

- Turn off L2C SRAM and reconfigure as L2 cache:
  Mediatek SoC uses part of the L2 cache as SRAM before DRAM is ready.
  After DRAM is ready, we should invoke disable_l2c_sram to reconfigure
  the L2C SRAM as L2 cache.

- Configure DMA buffer in DRAM:
  Set DRAM DMA to be non-cacheable to load blob correctly.

TEST=build pass
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I10f1cb8c62dfa78f59a4a5ea6087609668a0c2aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65753
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/mt8188/Makefile.inc

@@ -14,8 +14,10 @@ bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
 
 romstage-y += ../common/cbmem.c
 romstage-y += emi.c
+romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
 
 ramstage-y += emi.c
+ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
 ramstage-y += soc.c
 
 CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include

src/soc/mediatek/mt8188/soc.c

@@ -2,6 +2,7 @@
 
 #include <device/device.h>
 #include <soc/emi.h>
+#include <soc/mmu_operations.h>
 #include <symbols.h>
 
 static void soc_read_resources(struct device *dev)
@@ -11,6 +12,7 @@ static void soc_read_resources(struct device *dev)
 
 static void soc_init(struct device *dev)
 {
+	mtk_mmu_disable_l2c_sram();
 }
 
 static struct device_operations soc_ops = {