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x86 chipsets: utilize x86_setup_mtrrs_with_detect() 

For all the chipsets which were performing the following sequence:
  x86_setup_fixed_mtrrs();
  x86_setup_var_mtrrs(cpuid_eax(0x80000008) & 0xff, 2);

Replace that with x86_setup_mtrrs_with_detect() since it is equivalent.

Change-Id: I9f362dbf38942d675f615d22b9e5770ce65e5a08
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13936
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
This commit is contained in:
Aaron Durbin 2016-03-07 16:23:47 -06:00
parent f545208597
commit 2a08137fee
8 changed files with 8 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/cpu/intel/fsp_model_206ax/model_206ax_init.c
View File

@ -366,7 +366,6 @@ static void intel_cores_init(struct device *cpu)
static void model_206ax_init(struct device *cpu)
{
char processor_name[49];
struct cpuid_result cpuid_regs;
/* Turn on caching if we haven't already */
x86_enable_cache();
@ -381,9 +380,7 @@ static void model_206ax_init(struct device *cpu)
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Setup MTRRs based on physical address size */
cpuid_regs = cpuid(0x80000008);
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(cpuid_regs.eax & 0xff, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
/* Setup Page Attribute Tables (PAT) */

3
src/cpu/intel/haswell/haswell_init.c
View File

@ -717,8 +717,7 @@ static void configure_mca(void)
static void bsp_init_before_ap_bringup(struct bus *cpu_bus)
{
/* Setup MTRRs based on physical address size. */
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(cpuid_eax(0x80000008) & 0xff, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
initialize_vr_config();

5
src/cpu/intel/model_2065x/model_2065x_init.c
View File

@ -358,7 +358,6 @@ static void intel_cores_init(struct device *cpu)
static void model_2065x_init(struct device *cpu)
{
char processor_name[49];
struct cpuid_result cpuid_regs;
/* Turn on caching if we haven't already */
x86_enable_cache();
@ -374,9 +373,7 @@ static void model_2065x_init(struct device *cpu)
printk(BIOS_INFO, "CPU:lapic=%ld, boot_cpu=%d\n", lapicid (), boot_cpu ());
/* Setup MTRRs based on physical address size */
cpuid_regs = cpuid(0x80000008);
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(cpuid_regs.eax & 0xff, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
/* Setup Page Attribute Tables (PAT) */

5
src/cpu/intel/model_206ax/model_206ax_init.c
View File

@ -552,7 +552,6 @@ static void intel_cores_init(struct device *cpu)
static void model_206ax_init(struct device *cpu)
{
char processor_name[49];
struct cpuid_result cpuid_regs;
/* Turn on caching if we haven't already */
x86_enable_cache();
@ -567,9 +566,7 @@ static void model_206ax_init(struct device *cpu)
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Setup MTRRs based on physical address size */
cpuid_regs = cpuid(0x80000008);
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(cpuid_regs.eax & 0xff, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
/* Setup Page Attribute Tables (PAT) */

3
src/soc/intel/baytrail/cpu.c
View File

@ -83,8 +83,7 @@ void baytrail_init_cpus(device_t dev)
void *default_smm_area;
/* Set up MTRRs based on physical address size. */
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(pattrs->address_bits, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
mp_params.num_cpus = pattrs->num_cpus,

3
src/soc/intel/braswell/cpu.c
View File

@ -89,8 +89,7 @@ void soc_init_cpus(device_t dev)
__FILE__, __func__, dev_name(dev));
/* Set up MTRRs based on physical address size. */
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(pattrs->address_bits, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
mp_params.num_cpus = pattrs->num_cpus,

3
src/soc/intel/broadwell/cpu.c
View File

@ -573,8 +573,7 @@ static void configure_mca(void)
static void bsp_init_before_ap_bringup(struct bus *cpu_bus)
{
/* Setup MTRRs based on physical address size. */
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(cpuid_eax(0x80000008) & 0xff, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
initialize_vr_config();

3
src/soc/intel/skylake/cpu.c
View File

@ -343,8 +343,7 @@ static void configure_mca(void)
static void bsp_init_before_ap_bringup(struct bus *cpu_bus)
{
/* Setup MTRRs based on physical address size. */
x86_setup_fixed_mtrrs();
x86_setup_var_mtrrs(cpuid_eax(0x80000008) & 0xff, 2);
x86_setup_mtrrs_with_detect();
x86_mtrr_check();
}