mb/supermicro/x11-lga1151-series: correct superio interrupts
Add interrupts for all enabled superio devices to quiet the warning about missing interrupts in devicetree. Vendor uses interrupt 0x00 for all devices except SUART* and KBC, so let's do that, too. This also changes SWC from 0x0b to 0x00. Verified with superiotool on X11SSM-F. Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Change-Id: I7a6dc7345f020e53415a7d0d104ce93ab4b194fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/43886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonas Löffelholz Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -112,13 +112,17 @@ chip soc/intel/skylake
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io 0x62 = 0xa10
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io 0x64 = 0xa20
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io 0x66 = 0xa30
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irq 0x70 = 0xb
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irq 0x70 = 0x00
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end
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device pnp 2e.5 off end # KBC
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device pnp 2e.7 on end # GPIO
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device pnp 2e.7 on # GPIO
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irq 0x70 = 0x00
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end
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device pnp 2e.b off end # SUART3
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device pnp 2e.c off end # SUART4
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device pnp 2e.d on end # iLPC2AHB
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device pnp 2e.d on # iLPC2AHB
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irq 0x70 = 0x00
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end
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device pnp 2e.e on # Mailbox
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io 0x60 = 0xa40
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irq 0x70 = 0x00
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@ -99,13 +99,17 @@ chip soc/intel/skylake
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io 0x62 = 0xa10
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io 0x64 = 0xa20
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io 0x66 = 0xa30
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irq 0x70 = 0xb
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irq 0x70 = 0x00
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end
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device pnp 2e.5 off end # KBC
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device pnp 2e.7 on end # GPIO
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device pnp 2e.7 on # GPIO
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irq 0x70 = 0x00
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end
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device pnp 2e.b off end # SUART3
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device pnp 2e.c off end # SUART4
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device pnp 2e.d on end # iLPC2AHB
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device pnp 2e.d on # iLPC2AHB
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irq 0x70 = 0x00
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end
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device pnp 2e.e on # Mailbox
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io 0x60 = 0xa40
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irq 0x70 = 0x00
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