smsc/superio/sio1007: Fix header name

The file chip.h has a special purpose for defining the
configuration structure used in static devicetree.

Change-Id: If0289c29ca72768009c1b7166311bc4c3cee4171
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/mainboard/compulab/intense_pc/romstage.c

@@ -17,7 +17,7 @@
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
 #define SIO_PORT 0x164e

src/mainboard/intel/emeraldlake2/romstage.c

@@ -19,7 +19,7 @@
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <cpu/x86/lapic.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>

src/superio/smsc/sio1007/early_serial.c

@@ -15,7 +15,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include "chip.h"
+#include "sio1007.h"
 
 void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)
 {

src/superio/smsc/sio1007/sio1007.h

@@ -13,10 +13,11 @@
  * GNU General Public License for more details.
  */
 
-#ifndef SUPERIO_SMSC_1007_CHIP_H
+#ifndef SUPERIO_SMSC_SIO1007_H
-#define SUPERIO_SMSC_1007_CHIP_H
+#define SUPERIO_SMSC_SIO1007_H
+
+#include <stdint.h>
 
-/* FIXME: wrong place for this! */
 void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask);
 int sio1007_enable_uart_at(u16 port);