mb/hp: select TPM and TPM1 for all EliteBook laptops

All the Sandy/Ivy Bridge EliteBook and ProBook laptops currently
supported by coreboot and on review all support TPM 1.2 according the
maintenance and service guide manuals of these laptops. So select the
Kconfig options of TPM and TPM 1.2 and add the entry of it to the
common device tree.

The device tree C source files of 8460p generated by sconfig before
and after this change are compared. All the device nodes still exist
with nodes under LPC having different device number.

Tested with 2560p, which still works without problems, and the TPM can
be detected and used in the system.

Change-Id: Ic6158d3346a55e3d09c0a4ced9fd141b9a6c4256
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Iru Cai 2020-05-08 21:41:29 +08:00 committed by Patrick Georgi
parent 1bda1c356a
commit 2a59db7573
6 changed files with 7 additions and 15 deletions

View File

@ -11,6 +11,8 @@ config BOARD_HP_SNB_IVB_LAPTOPS
select SERIRQ_CONTINUOUS_MODE
select SYSTEM_TYPE_LAPTOP
select USE_NATIVE_RAMINIT
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM1
if BOARD_HP_SNB_IVB_LAPTOPS

View File

@ -42,8 +42,6 @@ config BOARD_HP_8460P
select GFX_GMA_PANEL_1_ON_LVDS
select INTEL_INT15
select MAINBOARD_HAS_LIBGFXINIT
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM1
select MAINBOARD_USES_IFD_GBE_REGION
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_SMSC_LPC47N217
@ -78,7 +76,6 @@ config BOARD_HP_FOLIO_9470M
select INTEL_GMA_HAVE_VBT
select INTEL_INT15
select MAINBOARD_HAS_LIBGFXINIT
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_USES_IFD_GBE_REGION
select SOUTHBRIDGE_INTEL_C216
@ -93,6 +90,4 @@ config BOARD_HP_REVOLVE_810_G1
select INTEL_GMA_HAVE_VBT
select MAINBOARD_USES_IFD_GBE_REGION
select MAINBOARD_HAS_LIBGFXINIT
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM1
select SOUTHBRIDGE_INTEL_C216

View File

@ -47,7 +47,11 @@ chip northbridge/intel/sandybridge
device pci 1b.0 on end # HD Audio controller
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on end # LPC bridge
device pci 1f.0 on # LPC bridge
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2

View File

@ -49,9 +49,6 @@ chip northbridge/intel/sandybridge
end
device pnp 4e.5 off end # COM2
end
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
end
end

View File

@ -40,9 +40,6 @@ chip northbridge/intel/sandybridge
register "ec_fan_ctrl_value" = "0x44"
device pnp ff.1 off end
end
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
end
end

View File

@ -40,9 +40,6 @@ chip northbridge/intel/sandybridge
register "ec_fan_ctrl_value" = "0x70"
device pnp ff.1 off end
end
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
end
end