Adds a CONFIG_MAX_PCI_BUSES to pci_locate_device()
Default is 255. This allows mainboard configs for working across various groups of boards that differ a device that may not loaded. If you search for a device that is not loaded and max buses is 255 then there can be up to a 8 second delay to search the entire PCI space. Board configs that know thier max bus can limit this search space. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -168,7 +168,7 @@ static inline __attribute__((always_inline)) void pci_write_config32(device_t de
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#define PCI_DEV_INVALID (0xffffffffU)
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static device_t pci_locate_device(unsigned pci_id, device_t dev)
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{
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for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) {
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for(; dev <= PCI_DEV(CONFIG_MAX_PCI_BUSES, 31, 7); dev += PCI_DEV(0,0,1)) {
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unsigned int id;
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id = pci_read_config32(dev, 0);
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if (id == pci_id) {
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@ -490,6 +490,11 @@ define CONFIG_SYS_CLK_FREQ
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export used
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comment "System clock frequency in MHz"
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end
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define CONFIG_MAX_PCI_BUSES
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default 255
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export always
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comment "Maximum number of PCI buses to search for devices"
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end
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###############################################
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# SMP options
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###############################################
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@ -38,6 +38,7 @@ uses CONFIG_CONSOLE_SERIAL8250
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uses CONFIG_UDELAY_TSC
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uses CONFIG_PCI_ROM_RUN
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uses CONFIG_CONSOLE_VGA
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uses CONFIG_MAX_PCI_BUSES
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## ROM_SIZE is the size of boot ROM that this board will use.
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default ROM_SIZE = 256*1024
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@ -121,5 +122,14 @@ default CROSS_COMPILE=""
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default CC="$(CROSS_COMPILE)gcc -m32"
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default HOSTCC="gcc"
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##
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## Set this to the max PCI bus number you
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## would ever use for PCI config IO.
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## Setting this number very high will make
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## pci_locate_device take a long time when
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## it can't find a device.
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##
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default CONFIG_MAX_PCI_BUSES = 5
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end
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