mb/google/skyrim: Add smihandler

BUG=b:214415408
TEST=builds
BRANCH=none

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: Icc52182294bb3402463a0a70a5c67779c60dfe32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62045
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/skyrim/variants/baseboard/Makefile.inc

@@ -1,3 +1,5 @@
 bootblock-y += gpio.c
 
 ramstage-y += gpio.c
+
+smm-y += gpio.c

src/mainboard/google/skyrim/variants/baseboard/gpio.c

@@ -141,6 +141,11 @@ static const struct soc_amd_gpio base_gpio_table[] = {
 	PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE),
 };
 
+/* GPIO configuration for sleep */
+static const struct soc_amd_gpio sleep_gpio_table[] = {
+	/* TODO: Fill sleep gpio configuration */
+};
+
 /* Early GPIO configuration in bootblock */
 static const struct soc_amd_gpio bootblock_gpio_table[] = {
 	/* TODO: Fill bootblock gpio configuration */
@@ -163,3 +168,9 @@ __weak void variant_bootblock_gpio_table(const struct soc_amd_gpio **gpio, size_
 	*size = ARRAY_SIZE(bootblock_gpio_table);
 	*gpio = bootblock_gpio_table;
 }
+
+__weak void variant_sleep_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
+{
+	*size = ARRAY_SIZE(sleep_gpio_table);
+	*gpio = sleep_gpio_table;
+}

src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h

@@ -22,4 +22,7 @@ void variant_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
 /* This function provides GPIO init in bootblock. */
 void variant_bootblock_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
 
+/* This function provides GPIO settings before entering sleep. */
+void variant_sleep_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
+
 #endif /* __BASEBOARD_VARIANTS_H__ */

src/mainboard/google/skyrim/variants/baseboard/smihandler.c

@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/smm.h>
+#include <variant/ec.h>
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	size_t num_gpios;
+	const struct soc_amd_gpio *gpios;
+
+	chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
+
+	variant_sleep_gpio_table(&gpios, &num_gpios);
+	program_gpios(gpios, num_gpios);
+}
+
+int mainboard_smi_apmc(u8 apmc)
+{
+	chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
+
+	return 0;
+}