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rockchip/rk3288: Reshuffle memlayout to make a bit more verstage space 

RK3288 is bursting at the seams again. This patch reshuffles two more
kilobytes to verstage to make things fit a little better.

Change-Id: I5e7667061dce3d02441be83c0b8fb81500a1b1a3
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78970
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Julius Werner 2023-11-09 12:06:56 -08:00 committed by Martin L Roth
parent d4d40c64e1
commit 2a87ef1eca
1 changed files with 6 additions and 6 deletions
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12
src/soc/rockchip/rk3288/memlayout.ld
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@ -17,13 +17,13 @@ SECTIONS
SRAM_START(0xFF700000) SRAM_START(0xFF700000)
TTB(0xFF700000, 16K) TTB(0xFF700000, 16K)
BOOTBLOCK(0xFF704004, 16K - 4) BOOTBLOCK(0xFF704004, 15K - 4)
PRERAM_CBMEM_CONSOLE(0xFF708000, 1K) PRERAM_CBMEM_CONSOLE(0xFF707C00, 1K)
VBOOT2_WORK(0xFF708400, 12K) VBOOT2_WORK(0xFF708000, 12K)
OVERLAP_VERSTAGE_ROMSTAGE(0xFF70B400, 47K + 768) OVERLAP_VERSTAGE_ROMSTAGE(0xFF70B000, 49K)
PRERAM_CBFS_CACHE(0xFF717300, 256)
TIMESTAMP(0xFF717400, 0x180) TIMESTAMP(0xFF717400, 0x180)
STACK(0xFF717580, 3K - 0x180) PRERAM_CBFS_CACHE(0xFF717580, 0x100)
STACK(0xFF717680, 3K - 0x280)
SRAM_END(0xFF718000) SRAM_END(0xFF718000)
/* 4K of special SRAM in PMU power domain. /* 4K of special SRAM in PMU power domain.