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nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase 

Change-Id: Id37d2367d57ff925476c53bb0edab927c1c768f6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Angel Pons 2019-12-31 14:24:12 +01:00 committed by Felix Held
parent 50b7ed2bbe
commit 2a9a49b7ba
2 changed files with 3 additions and 3 deletions
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4
src/northbridge/intel/sandybridge/raminit_common.c
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@ -3134,10 +3134,10 @@ void final_registers(ramctr_timing * ctrl)
if (is_mobile) if (is_mobile)
/* APD - DLL Off, 64 DCLKs until idle, decision per rank */ /* APD - DLL Off, 64 DCLKs until idle, decision per rank */
MCHBAR32(PM_PDWN_Config) = 0x00000740; MCHBAR32(PM_PDWN_CONFIG) = 0x00000740;
else else
/* APD - PPD, 64 DCLKs until idle, decision per rank */ /* APD - PPD, 64 DCLKs until idle, decision per rank */
MCHBAR32(PM_PDWN_Config) = 0x00000340; MCHBAR32(PM_PDWN_CONFIG) = 0x00000340;
FOR_ALL_CHANNELS FOR_ALL_CHANNELS
MCHBAR32(0x4380 + 0x400 * channel) = 0x00000aaa; MCHBAR32(0x4380 + 0x400 * channel) = 0x00000aaa;

2
src/northbridge/intel/sandybridge/sandybridge.h
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@ -133,7 +133,7 @@ enum platform_type {
#define SC_IO_LATENCY_C0 0x4028 /* IO Latency Configuration */ #define SC_IO_LATENCY_C0 0x4028 /* IO Latency Configuration */
#define TC_RFP_C0 0x4294 /* Refresh Parameters */ #define TC_RFP_C0 0x4294 /* Refresh Parameters */
#define TC_RFTP_C0 0x4298 /* Refresh Timing Parameters */ #define TC_RFTP_C0 0x4298 /* Refresh Timing Parameters */
#define PM_PDWN_Config 0x4cb0 #define PM_PDWN_CONFIG 0x4cb0
#define MAD_CHNL 0x5000 /* Address Decoder Channel Configuration */ #define MAD_CHNL 0x5000 /* Address Decoder Channel Configuration */
#define MAD_DIMM_CH0 0x5004 /* Address Decode Channel 0 */ #define MAD_DIMM_CH0 0x5004 /* Address Decode Channel 0 */
#define MAD_DIMM_CH1 0x5008 /* Address Decode Channel 1 */ #define MAD_DIMM_CH1 0x5008 /* Address Decode Channel 1 */