mb/google/fizz: Set Pmax to 120 for all SKUs

The Pmax is calcuated from MAX(Psku1, Psku2), where Psku1, Psku2 are
estimated Pmax power of U42 and U22 skus. For U42 sku, the Pmax is PL4
(71W) + ROPmax (49W) = 120W; for U22 SKU, the Pmax is PL4 (43W) +
ROPmax (49W) = 92W. So Pmax is set to MAX(120W, 92W) = 120W.

BUG=b:71594855
BRANCH=None
TEST=Make sure correct pmax value is being passed into fsp

Change-Id: Ic27fef87c869094b20438e6ee0e1eb0b35122b8d
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/23633
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Chris Ching <chingcodes@chromium.org>
This commit is contained in:
Shelley Chen 2018-02-06 21:16:04 -08:00 committed by Furquan Shaikh
parent dc4bc06bb7
commit 2a9e8124e1
1 changed files with 1 additions and 0 deletions

View File

@ -285,6 +285,7 @@ chip soc/intel/skylake
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
register "tdp_psyspl2" = "90" register "tdp_psyspl2" = "90"
register "psys_pmax" = "120"
register "tcc_offset" = "6" # TCC of 94C register "tcc_offset" = "6" # TCC of 94C
# Use default SD card detect GPIO configuration # Use default SD card detect GPIO configuration