soc/intel/elkhartlake: Skip FSP Notify APIs
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(soc/intel/alderlake: Skip FSP Notify APIs) to skip FSP Notify APIs. Elkhart Lake SoC deselects Kconfigs as below: - USE_FSP_NOTIFY_PHASE_READY_TO_BOOT - USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE to skip FSP notify APIs (Ready to boot and End of Firmware) and make use of native coreboot driver to perform SoC recommended operations prior booting to payload/OS. When deselecting these Kconfigs, cse_final_ready_to_boot() and cse_final_end_of_firmware() in the common cse driver will be used instead as required operations to perform prior to booting to OS. Check out this CL for further info: commit90e318bba
(soc/intel/common/cse: Add `finalize` operation for CSE) Additionally, create a helper function `heci_finalize()` to keep HECI related operations separated for easy guarding again config. Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Change-Id: I477c204233f83bc96fd5cd39346bff15ed942dc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63762 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -65,8 +65,6 @@ config CPU_SPECIFIC_OPTIONS
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select UDELAY_TSC
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select UDELAY_TSC
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select UDK_202005_BINDING
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select UDK_202005_BINDING
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select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
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select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
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select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
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select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
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config MAX_CPUS
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config MAX_CPUS
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int
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int
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@ -6,6 +6,7 @@
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <device/mmio.h>
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#include <device/mmio.h>
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#include <device/pci.h>
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#include <device/pci.h>
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#include <intelblocks/cse.h>
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/pmclib.h>
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#include <intelblocks/pmclib.h>
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@ -30,12 +31,22 @@ static void pch_finalize(void)
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pmc_clear_pmcon_sts();
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pmc_clear_pmcon_sts();
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}
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}
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static void heci_finalize(void)
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{
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heci_set_to_d0i3();
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if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
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heci1_disable();
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}
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static void soc_finalize(void *unused)
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static void soc_finalize(void *unused)
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{
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{
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printk(BIOS_DEBUG, "Finalizing chipset.\n");
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printk(BIOS_DEBUG, "Finalizing chipset.\n");
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pch_finalize();
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pch_finalize();
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apm_control(APM_CNT_FINALIZE);
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apm_control(APM_CNT_FINALIZE);
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if (CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT) &&
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CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE))
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heci_finalize();
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/* Indicate finalize step with post code */
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/* Indicate finalize step with post code */
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post_code(POST_OS_BOOT);
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post_code(POST_OS_BOOT);
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