From 2b2325ef87ce57a1e53ad4bfc757854a36cf638e Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Thu, 31 Jan 2019 20:53:10 +0100
Subject: [PATCH] superio/winbond/w83627ehg: Correct CR 0x2a comment

Register 0x2a [Bit 1] is a PIN89, PIN90 function select for i2c

Change-Id: I9231a68ec7e9a3130a6b6975544bf89ab09cb3e6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31185
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/superio/winbond/w83627ehg/superio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c
index 04dda6edc7..736d660e40 100644
--- a/src/superio/winbond/w83627ehg/superio.c
+++ b/src/superio/winbond/w83627ehg/superio.c
@@ -32,7 +32,7 @@ static void enable_hwm_smbus(struct device *dev)
 {
 	u8 reg8;
 
-	/* Configure pins 91/92 as SDA/SCL (I2C bus). */
+	/* Configure pins 89/90 as SDA/SCL (I2C bus). */
 	reg8 = pnp_read_config(dev, 0x2a);
 	reg8 |= (1 << 1);
 	pnp_write_config(dev, 0x2a, reg8);